Partition
FS(R/X)
0-15
0
A
Block
Channels
16-31
1
B
0-15
0
A
0-15
0
A
16-31
1
B
0-15
0
A
16-31
1
B
0-15
0
A
16-31
1
B
mcbsp-043
Public Version
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McBSP Functional Description
•
Assign an odd-numbered block (1, 3, 5, or 7) to receive partition B with the
McBSPi.
[8:7] RPBBLK field. In the receive multichannel selection mode, the
channels in this partition are controlled by receive channel enable register B
(McBSPi.
).
For transmission:
•
Assign an even-numbered channel block (0, 2, 4, or 6) to transmit partition A by writing to the
McBSPi.
[6:5] XPABLK fields. In one of the transmit multichannel selection
modes, the channels in this partition are controlled by transmit channel enable register A
(McBSPi.
•
Assign an odd-numbered block (1, 3, 5, or 7) to transmit partition B with the
McBSPi.
[8:7] XPBBLK field. In one of the transmit multichannel selection
modes, the channels in this partition are controlled by transmit channel enable register B
(McBSPi.
shows an example of alternating between the channels of partition A and the channels of
partition B. Channels 0–15 have been assigned to partition A, and channels 16–31 have been assigned to
partition B. In response to a frame-synchronization pulse, the McBSP module begins a frame transfer with
partition A and then alternates between partitions B and A until the complete frame is transferred.
Figure 21-48. Alternating Between Partitions A and B Channels
21.4.6.7 Transmit Multichannel Selection Modes
The McBSPi.
[1:0] XMCM field determine whether all channels or only selected
channels are enabled and unmasked for transmission. The McBSP module has three transmit
multichannel selection modes (XMCM = 0b01, XMCM = 0b10, and XMCM = 0b11), which are described in
.
Table 21-22. Selecting a Transmit Multichannel Selection Mode With the XMCM Bit Field
XMCM
Transmit Multichannel Selection Mode
0b00
No transmit multichannel selection mode is on. All channels are enabled and unmasked. No channels can be disabled or
masked.
0b01
All channels are disabled unless they are selected in the appropriate transmit channel enable registers
(McBSPi.
). If enabled, a channel in this mode is also unmasked.
The McBSPi.
[9] XMCME bit determines whether 32 channels or 128 channels are selectable in the
registers.
0b10
All channels are enabled, but they are masked unless they are selected in the appropriate transmit channel enable registers
(McBSPi.
[9] XMCME bit
determines whether 32 channels or 128 channels are selectable in the
McBSPi.
registers.
0b11
This mode is used for symmetric transmission and reception. All channels are disabled for transmission unless they are
enabled for reception in the appropriate receive channel enable registers
(McBSPi.
). Once enabled, they are masked unless they are also
selected in the appropriate transmit channel enable registers
(McBSPi.
[9] XMCME bit
determines whether 32 channels or 128 channels are selectable in
McBSPi.
registers and
registers.
3117
SWPU177N – December 2009 – Revised November 2010
Multi-Channel Buffered Serial Port
Copyright © 2009–2010, Texas Instruments Incorporated
Содержание OMAP36 Series
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Страница 2974: ...2974 UART IrDA CIR SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3054: ...3054 Multichannel SPI SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
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