Texas Instruments OMAP36 Series, Техническое справочное руководство

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Camera ISP Functional Description
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– Used together with the resizer in upscale mode. Each buffer must contain at least ceil (vertical
zoom factor) images lines
• Support of 2D addressing modes
• Memory fragmentation support for CBUFF0
• VRFB context grouping support
• Strong error detection mechanisms
• Buffer addresses are 64-bit aligned, but window fill level managing is byte accurate.
• Read and write accesses are supported.
• Bandwidth Control Feedback loop connected to the CSI1/CCP2B receiver flexible input
6.4.10.2 Camera ISP Circular Buffer Interrupts
All events generated (see Table 6-16 for details) by the circular buffer are merged into a single event at
camera ISP level. This event can be mapped to MPU SS by enabling the ISP_IRQ0ENABLE [21]
CBUFF_IRQ bit or to IVA2.2 by enabling the ISP_IRQ1ENABLE [21] CBUFF_IRQ bit.
6.4.10.3 Camera ISP Circular Buffer Functional Description
The CBUFF module maps a virtual address space to a physical space called circular buffer. The CBUFF
module can handle up to 2 independent circular buffers CBUFF0 and CBUFF1.
This section gives an overview of typical uses of the module.
6.4.10.3.1 Camera ISP Circular Buffer Bandwidth Control Feedback Loop
The bandwidth control feedback (BCF) feature can be used in memory to memory operation when the
camera ISP reads data through the CSIb receivers flexible input.
At a given time a certain number of physical buffers are available for the processor. Depending, if the
circular buffer is configured in read or write mode, the processor can, respectively, write or read those
physical buffers.
When the number of physical buffers to be processed by the processor increases, the number of physical
buffers available to the camera ISP decreases. When the number of physical buffers available for the
camera ISP becomes too low, the corresponding BCF signal is asserted. This signal can be used to stall
the data read flow.
The camera ISP supports two mechanisms to reduce the processing speed in memory to memory
operation:
• Add a fixed delay between memory read requests. Delays can be added:
– At SBL level for all image data read ports (histogram, preview, CSI1/CCP2B and resizer)
– At CSI1/CCP2B module level by slowing down the video port clock
• Stall memory reads based on the level of the circular buffer. That is the purpose of the BCF feature
described in this section.
6.4.10.3.1.1 Camera ISP Circular Buffer Single Slice Mode
The camera ISP writes data with an incremental addressing scheme to the virtual space. The physical
buffer is smaller than the virtual space. Therefore, the physical buffer locations is read or written multiple
times. See
Figure 6-99 .
1234 Camera Image Signal Processor SWPU177N – December 2009 – Revised November 2010
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