MSP430F6438, MSP430F6436, MSP430F6435, MSP430F6433
SLAS720D – AUGUST 2010 – REVISED DECEMBER 2015
Low-Power Mode With LCD Supply Currents (Into V
CC
) Excluding External Current (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEMPERATURE (T
A
)
PARAMETER
V
CC
PMMCOREVx
–40°C
25°C
60°C
85°C
UNIT
TYP
MAX
TYP
MAX
TYP
MAX
TYP
MAX
0
2.7
3.2
3.8
5.9
7.9
12.2
Low-power mode 3
I
LPM3,
(LPM3) current, LCD 4-
1
2.7
3.2
6.1
8.1
LCD,
mux mode, internal
3 V
µA
2
2.8
3.3
6.2
8.3
int. bias
biasing, charge pump
disabled
(3) (5)
3
2.8
3.3
4.9
6.4
8.4
13.7
0
3.8
2.2 V
1
3.9
µA
Low-power mode 3
2
4.0
(LPM3) current, LCD 4-
I
LPM3
mux mode, internal
0
4.0
LCD,CP
biasing, charge pump
1
4.1
enabled
(3) (6)
3 V
µA
2
4.2
3
4.2
(5)
LCDMx = 11 (4-mux mode), LCDREXT = 0, LCDEXTBIAS = 0 (internal biasing), LCD2B = 0 (1/3 bias), LCDCPEN = 0 (charge pump
disabled), LCDSSEL = 0, LCDPREx = 101, LCDDIVx = 00011 (f
LCD
= 32768 Hz/32/4 = 256 Hz)
Even segments S0, S2,... = 0, odd segments S1, S3,... = 1. No LCD panel load.
(6)
LCDMx = 11 (4-mux mode), LCDREXT = 0, LCDEXTBIAS = 0 (internal biasing), LCD2B = 0 (1/3 bias), LCDCPEN = 1 (charge pump
enabled), VLCDx = 1000 (V
LCD
= 3 V, typical), LCDSSEL = 0, LCDPREx = 101, LCDDIVx = 00011 (f
LCD
= 32768 Hz/32/4 = 256 Hz)
Even segments S0, S2,... = 0, odd segments S1, S3,... = 1. No LCD panel load.
5.7
Thermal Resistance Characteristics
PARAMETER
VALUE
UNIT
QFP (PZ)
122
θ
JA
Junction-to-ambient thermal resistance, still air
(1)
°C/W
BGA (ZQW)
108
QFP (PZ)
83
θ
JC(TOP)
Junction-to-case (top) thermal resistance
(2)
°C/W
BGA (ZQW)
72
QFP (PZ)
98
θ
JB
Junction-to-board thermal resistance
(3)
°C/W
BGA (ZQW)
76
(1)
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2)
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(3)
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
Copyright © 2010–2015, Texas Instruments Incorporated
Specifications
21
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