Configuring the EVM
Table 3. Control Pin Interfaces for Soft Pin Mode or Register Default Mode (JP18 HWCTRL =
LO) (continued)
NAME
COMPONENT
DESCRIPTION
(TYPE)
XTAL Frequency Margining Offset Resistor switch bank
If the XTAL input is used as the PLL reference, the PLL and its output clocks will track the frequency
offset of the XTAL.
When JP24 is open and JP23 is low, switch S5 can be used to configure one of the 8 pull-down
resistors (RPD) on GPIO5 and select the corresponding XTAL load capacitance and frequency offset
(STEP1 to 8) as follows:
XO
XO OFFSET
S5 Position
OFFSET_STEP
_STEP#
Nominal Freq.
GPIO5 RPD
GPIO5 Voltage
ON
(1)
# Register
Setting (dec)
Offset
(2)
Control
(2)
Pos. 1
0
Ω
0.0 V
STEP1
227
+50 ppm
XO MARGIN
Pos. 2
2.32 k
Ω
0.2 V
STEP2
306
+25 ppm
S5
(8-position
SPST switch)
Pos. 3
5.62 k
Ω
0.4 V
STEP3
345
+15 ppm
Pos. 4
10.5 k
Ω
0.6 V
STEP4
412
0 ppm
(Default)
Pos. 5
18.7 k
Ω
0.8 V
STEP5
494
-15 ppm
Pos. 6
34.8 k
Ω
1.0 V
STEP6
558
-25 ppm
Pos. 7
84.5 k
Ω
1.2 V
STEP7
676
-40 ppm
Pos. 8
open
1.4 V
STEP8
778
-50 ppm
(1)
Only one position should be ON at a time (all others are OFF).
(2)
Applies only to Soft Pin Mode using the EVM’s default EEPROM settings optimized for a 9-pF crystal.
For Register Default Mode, refer to the datasheet for the default XOOFFSET_STEP# register settings.
PDN push-button switch
When pressed, the device PDN pin (active low) is pulled down to power-down the device. When
released, the PDN pin is pulled high to trigger the POR sequence, initialize the registers per the
selected operating mode, and begin normal operation.
PDN
S6
PDN STATE
DEVICE OPERATION
(2-level input)
Power-down mode
LO (Pushed)
(I2C interface disabled)
HI (Released)
Normal operation
USB port (Mini-B type)
Using the GUI platform, USB controller (U8) provides the USB-to-I2C interface to manage the
LMK03328 device registers and EEPROM. When USB communication is established with a Host PC
J27
USB
running the GUI, LED D10 should be lit solid green.
By default, the USB port powers LDO regulator U9 to supply 3.3 V power for the MCU and its peripheral
circuitry.
Optional Test Point Access to I2C and Control pins
Pin 1: SDA
Pin 2: SCL
Pin 4: N/C
Pin 3: N/C
J28
U2A
(not populated)
Pin 5: GND
Pin 6: N/C
Pin 7: REFSEL
Pin 8: HW_SW_CTRL
Pin 9: PDN
Pin 10: GPIO0
14
LMK03328EVM User’s Guide
SNAU184 – August 2015
Copyright © 2015, Texas Instruments Incorporated