USCI40
USCI Module
Category
Functional
Function
SPI Slave Transmit with clock phase select = 1
Description
In SPI slave mode with clock phase select set to 1 (UCAxCTLW0.UCCKPH=1), after the
first TX byte, all following bytes are shifted by one bit with shift direction dependent on
UCMSB. This is due to the internal shift register getting pre-loaded asynchronously when
writing to the USCIA TXBUF register. TX data in the internal buffer is shifted by one bit
after the RX data is received.
Workaround
Reinitialize TXBUF before using SPI and after each transmission.
If transmit data needs to be repeated with the next transmission, then write back
previously read value:
UCAxTXBUF = UCAxTXBUF;
Advisory Descriptions
SLAZ669P – MAY 2015 – REVISED AUGUST 2021
MSP430FG6426 Microcontroller
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