Texas Instruments Errata MSP430FG6426, Руководство пользователя

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PMM26 PMM Module
Category
Functional
Function Device lock-up if RST pin pulled low during write to SVSMHCTL or SVSMLCTL
Description Device results in lock-up condition under one of the two scenarios below:
1) If RST pin is pulled low during write access to SVSMHCTL, with the RST/NMI pin
is configured to reset function and is pulled low (reset event) the device will stop code
execution and is continuously held in reset state. RST pin is no longer functional. The only
way to come out of the lock-up situation is a power cycle.
OR
2) If RST pin is pulled low during write access to SVSMLCTL and only if the code that
checks for SVSMLDLYIFG==1 is implemented without a timeout. The device will be stuck
in the polling loop polling since SVSMLDLYIFG will never be cleared.
Workaround Follow the sequence below to prevent the lock-up for both use cases:
1) Disable RST pin reset function and switch to NMI before access SVSMHCTL or
SVSMLCTL.
then
2) Activate NMI interrupt and handle reset events in this time by SW (optional if reset
functionality required during access SVSMHCTL or SVSMLCTL)
then
3) Enable RST pin reset function after access to SVSMHCTL or SVSMLCTL
To prevent lock-up caused by use case #2 a timeout for the SVSMLDLYIFG flag check
should be implemented to 300us.
PORT15 PORT Module
Category Functional
Function In-system debugging causes the PMALOCKED bit to be always set
Description The port mapping controller registers cannot be modified when single-stepping or halting
at break points between a valid password write to the PMAPWD register and the expected
lock of the port mapping (PMAP) registers. This causes the PMAPLOCKED bit to remain
set and not clear as expected.
Note: This erratum only applies to in-system debugging and is not applicable when
operating in free-running mode.
Workaround Do not single step through or place break points in the port mapping configuration section
of code.
PORT19 PORT Module
Category
Functional
Function Port interrupt may be missed on entry to LPMx.5
Description If a port interrupt occurs within a small timing window (~1MCLK cycle) of the device entry
into LPM3.5 or LPM4.5, it is possible that the interrupt is lost. Hence this interrupt will not
trigger a wakeup from LPMx.5.
Workaround None
www.ti.com Advisory Descriptions
SLAZ669P – MAY 2015 – REVISED AUGUST 2021
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MSP430FG6426 Microcontroller 17
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