(
) (
)
(
)
(
) (
)
(
)
1
2
3
R
R
VOUT
VOUT
VOUT
VIN
VIN
1
R
æ
ö
+
=
+ -
- =
+ -
-
+
ç
÷
è
ø
+
±
V+
C2
V-
C1
R5
C4
VREF
VIN+
R2
R3
+
±
V+
V-
R1
VOUT+
R4
C3
VREF
VIN-
VOUT-
c
1
1
1
2
R
C
=
´ p ´
´
f
Schematic and PCB Layout
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SBOU193 – July 2017
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Copyright © 2017, Texas Instruments Incorporated
DUAL-DIYAMP-EVM
Similarly, capacitor C1 creates a high-pass filter with R1.
Equation 22
calculates the corner frequency of
the high-pass filter created by C1 and R1.
(22)
Figure 26
displays the PCB layout of the top layer of the parallel op amp circuit configuration.
Figure 26. Parallel Op-Amp Top Layer PCB Layout
3.11 Differential Input to Differential Output
Figure 27
displays the schematic for the differential input to differential output circuit configuration.
Figure 27. Differential Input to Differential Output Schematic
The differential input to differential output circuit configuration is used to condition a differential signal,
such as gain or attenuation, and still maintain the signal as differential.
Equation 23
calculates the transfer function of the differential input to differential output circuit
configuration shown in
Figure 27
.
(23)
