4 Software
4.1 DLP Composer
DLP Composer for DLP3021-Q1 is a software tool that allows users to configure and generate firmware flash
data for the DMD controller of the EVM. In the case of the DLP3021LEQ1EVM, the firmware file generated is
specific to the FPGA based DMD controller, and loaded into external SPI flash memory. The DMD controller
executes commands to read image/video content from the SPI flash memory, and processes the content into the
Data Rate (DDR) interface format compatible with the DLP3021-Q1 data bus. The image/video content must be
flashed into the external SPI flash memory prior to running the GUI. Image/video content cannot be uploaded or
streamed in real-time to the DMD controller.
The DLP Composer DGP process is explained with more detail in the
DLP3021-Q1 Dynamic Ground Projection
System Design
) report.
4.1.1 Default Register Configuration
This page determines the default start-up conditions of select DMD controller registers. Certain registers enable
read and write permissions during typical operation to allow settings to be changed after flash programming,
while certain registers only allow read permissions after flash programming during typical operation. See the
DLP3021-Q1 FPGA User's Guide
) for details on each register.
Figure 4-1. DLP Composer - Default Register Configuration
Key settings to configure on this page include:
• whether or not content should be displayed immediately after power-up.
• the ready state default display content immediately after power-up.
• the PWM and duty cycle of each LED driver, and the PWM enable state.
Software
DLPU106A – MARCH 2021 – REVISED OCTOBER 2021
DLP3021LEQ1EVM Evaluation Module
15
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