DAC8742HEVM Documentation
www.ti.com
16
SLAU700A – June 2017 – Revised November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
DAC8742H Evaluation Module
The third and final section displays the HART or PAFF Write and Read control and indicator fields. Once
the mode is selected (shown in section 1) with the desired communication method (SPI, or UART), the
user can then input a valid HART/PAFF 8-bit hexadecimal array to write over the HART/PAFF BUS (Red
Box). The maximum amount of elements that can transfer to the internal FIFO are 15; therefore, the
number of elements input into the field should never exceed 15. Once the elements are input, press the
Generate Write
button (Green box), and this shifts the contents into the FIFO and transmit for the
specified industrial protocol (HART/PAFF). Press the
Generate Read
button (Orange box) if you are
expecting an incoming transmission to the DAC8742H device. Once pressed, the
HART/PAFF Read
field
(Yellow box) will update with the captured data.
NOTE:
For Read operations in UART, the user must specify the
# Bytes to Read
for proper
readback operation. (Purple box).
The
Reinit Arrays
button (gray box) clears the array fields. The
FULL DUPLEX
button connects TX FIFO
to RX FIFO.
Figure 12. HART/PAFF Write/Read Control and Indicator Section
6
DAC8742HEVM Documentation
This section contains the complete bill of materials and schematic diagram for the DAC8742HEVM.
Documentation information for the USB2ANY platform is found in the
USB2ANY Platform User’s Guide
.
