DAC8742HEVM Software Overview
www.ti.com
14
SLAU700A – June 2017 – Revised November 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
DAC8742H Evaluation Module
5.2.2
DAC8742HEVM High Level Configuration Page
The
High Level Configuration
page provides an interface to observe and control the different data
registers, modes, and configurations available for the DAC8742H device.
Figure 9
displays this page.
Figure 9. High Level Configuration Page
This page is broken into three sections responsible for different modes of communication (UART/SPI), as
well as HART or PAFF mode of operation.
The first section is responsible for choosing the form of digital communication. The COMMUNICATION
MODE panel is responsible for selecting between HART and PAFF. The remaining three input controls
are only operable in SPI, but are used to modify the FIFO level set register (0x25) and TX_AMP
parameter of the MODEM CONTROL register (0x22). The FIFO levels set register is responsible for
programming the alarm thresholds for both transmit and receive FIFOs. The Hart Amplitude (TX_AMP)
input control allows the user to input an unsigned binary value that controls the amplitude (HART mode
only) of the transmitted waveform in 25-mVpp steps.
