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General Use Features
7
SLVUBP0A – May 2019 – Revised August 2019
Copyright © 2019, Texas Instruments Incorporated
TPS23881EVM: PoE, PSE, TPS23881 Evaluation Module
3.3
EVM Test Points
lists and describes the EVM test points.
Table 4. EVM Test Points
TP
COLOR
LABEL
DESCRIPTION
Motherboard: BOOST-PSEMTHR-007
TP1
RED
VPWR
Used for VPWR
TP2
RED
3.3 V
Used for TPS23881 VDD
TP3
SMT
GND
VPWR ground
TP4
WHT
SDA
I
2
C Data from LaunchPad and USB-TO-GPIO
TP5
WHT
SCL
I
2
C Clock from LaunchPad and USB-TO-GPIO
TP6
WHT
PSE_SDAO
I
2
C data out from TPS23881
TP7
WHT
PSE_SCL
I
2
C clock to TPS23881
TP8
WHT
PSE_SDAI
I
2
C data in to TPS23881
TP9
BLK
GND1
Ground from LaunchPad and USB2ANY
TP11
SMT
TP11
Chassis ground test point
TP14
SMT
GND
VPWR ground test point
TP15
SMT
GND
VPWR ground test point
TP16
SMT
GND
VPWR ground test point
Daughterboard: TPS23881EVM-008
TP2
RED
2P4D
Two-pair port 4 DRAIN
TP3
WHT
2P4G
Two-pair port 4 GATE
TP4
WHT
4P1AG
Four-pair port 1A GATE
TP5
RED
4P1AD
Four-pair port 1A DRAIN
TP7
WHT
4P1BG
Four-pair port 1B GATE
TP6
RED
4P1BD
Four-pair port 1B DRAIN
TP1
BLK
GND
VPWR ground
TP8
SMT
GND
VPWR ground
3.4
EVM Test Jumpers
The EVM is equipped with shunts on the jumper positions identified in
, in the
Default Pin Position
column. Shunts can be moved and removed, as required, during use.
Table 5. EVM Jumpers
JUMPER
DEFAULT PIN
POSITION
LABEL
DESCRIPTION
Motherboard: BOOST-PSEMTHR-007
J27
1-2
P1
Two-pair port 1 LED bias
J28
1-2
P2
Two-pair port 2 LED bias
J16
1-2
P3
Two-pair port 3 LED bias
J15
1-2
P4
Two-pair port 4 LED bias
J26
1-2
P5
Four-pair port 1A LED bias
J25
1-2
P6
Four-pair port 1B LED bias
J14
1-2
P7
Four-pair port 2A LED bias
J13
1-2
P8
Four-pair port 2B LED bias
Daughterboard: TPS23881EVM-008
J4
1-2;3-4;5-6;7-8
A1;A2;A3;A
4
I2C A1-A4 address lines
J5
Open
NA
AUTO pin selection(autonomous mode is enabled if
connecting auto pin to ground with selected resistance )