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Application Information

The maximum power dissipation point given by

Equation 3

must not exceed the power dissipation given

by:

P

DMAX

= (T

JMAX

- T

A

) /

θ

JA

(4)

The LM49100's T

JMAX

= 150°C. In the csBGA package, the LM49100's

θ

JA

is 50.2°C/W. At any given

ambient temperature T

A

, use

Equation 4

to find the maximum internal power dissipation supported by the

IC packaging. Rearranging

Equation 4

and substituting P

DMAX-TOTAL

for P

DMAX

results in

Equation 5

. This

equation gives the maximum ambient temperature that still allows maximum stereo power dissipation
without violating the LM49100's maximum junction temperature.

T

A

= T

JMAX

- P

DMAX-TOTAL

θ

JA

(5)

For a typical application with a 5V power supply and an 8

load, the maximum ambient temperature that

allows maximum mono power dissipation without exceeding the maximum junction temperature is
approximately 114°C for the csBGA package.

Equation 6

gives the maximum junction temperature T

JMAX

. If the result violates the LM49100's 150°C,

reduce the maximum junction temperature by reducing the power supply voltage or increasing the load
resistance. Further allowance should be made for increased ambient temperatures.

T

JMAX

= P

DMAX-TOTAL

θ

JA

+ T

A

(6)

The previous examples assume that a device is a surface mount part operating around the maximum
power dissipation point. Since internal power dissipation is a function of output power, higher ambient
temperatures are allowed as output power or duty cycle decreases. If the result of

Equation 3

is greater

than that of

Equation 4

, then decrease the supply voltage, increase the load impedance, or reduce the

ambient temperature. If these measures are insufficient, a heat sink can be added to reduce

θ

JA

. The heat

sink can be created using additional copper area around the package, with connections to the ground
pin(s), supply pin and amplifier output pins.

15.9 Power Supply Bypassing

As with any power amplifier, proper supply bypassing is critical for low noise performance and high power
supply rejection. Applications that employ a 5V regulator typically use a 1µF in parallel with a 0.1µF filter
capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's
transient response. However, their presence does not eliminate the need for a local 4.7µF tantalum
bypass capacitor and a parallel 0.1µF ceramic capacitor connected between the LM49100's supply pin
and ground. Keep the length of leads and traces that connect capacitors between the LM49100's power
supply pin and ground as short as possible.

15.10 Selecting External Components

15.10.1 Input Capacitor Value Selection

Amplifying the lowest audio frequencies requires high value input coupling capacitor (C

IN

in

Figure 1

). A

high value capacitor can be expensive and may compromise space efficiency in portable designs. In many
cases, however, the loudspeakers used in portable systems, whether internal or external, have little ability
to reproduce signals below 150Hz. Applications using loudspeakers and headphones with this limited
frequency response reap little improvement by using large input capacitor.

The internal input resistor (R

i

), typical 12.5k

, and the input capacitor (C

IN

) produce a high pass filter

cutoff frequency that is found using:

f

c

= 1 / (2

π

R

i

C

IN

)

(7)

17

SNAA043A – October 2007 – Revised May 2013

AN-1622 LM49100 Evaluation Board»

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Copyright © 2007–2013, Texas Instruments Incorporated

Содержание AN-1622 LM49100

Страница 1: ...pin and HPR pin carries the output signals from the two amplifiers and each of the other pins connecting to ground making this configuration single ended connections 6 Differential mono amplifier outp...

Страница 2: ...th a mono input signal The LM49100 features a 32 step digital volume control and ten distinct output modes The mixer volume control and device mode select are controlled through an I2 C compatible int...

Страница 3: ...d is an I2 C signal generation board and software With this board and the software the user can easily control the LM49100 s shutdown function mute and stereo volume control Figure 2 shows the softwar...

Страница 4: ...ation board VDDHP GND Headphone power supply for the headphone amplifier which creates split supplies for the positive voltage is converted by switch capacitor creating a negative voltage of equal mag...

Страница 5: ...udes controls for the amplifier s volume control individual channel shutdown and the mute function The control program s on screen user interface is shown in Figure 2 The Default button is used to ret...

Страница 6: ...r 0 1 F 0805 HPL 2 pin header 100 mil pitch 1x2 Header HPR 2 pin header 100 mil pitch 1x2 Header I2C 6 pin 6 pin header 100 mil pitch 2x3 Header Header Left Input 2 pin header 100 mil pitch 1x2 Header...

Страница 7: ...ration Board PCB Layout Figure 4 Top Overlay Figure 5 Top Layer 7 SNAA043A October 2007 Revised May 2013 AN 1622 LM49100 Evaluation Board Submit Documentation Feedback Copyright 2007 2013 Texas Instru...

Страница 8: ...yout www ti com Figure 6 Upper Inner Layer Figure 7 Lower Middle Layer 8 AN 1622 LM49100 Evaluation Board SNAA043A October 2007 Revised May 2013 Submit Documentation Feedback Copyright 2007 2013 Texas...

Страница 9: ...ion Board PCB Layout Figure 8 Bottom Layer Figure 9 Bottom Overlay 9 SNAA043A October 2007 Revised May 2013 AN 1622 LM49100 Evaluation Board Submit Documentation Feedback Copyright 2007 2013 Texas Ins...

Страница 10: ...5 respectively Typical THD N versus Output Power performance curves at VDD 3V 3 6V and 5V for 32 and 8 are shown in Figure 16 and Figure 17 respectively Figure 10 THD N vs Frequency Figure 11 THD N vs...

Страница 11: ...ti com Typical Demonstration Board Audio Performance Figure 16 THD N vs Output Power Figure 17 THD N vs Output Power RL 32 f 1kHz RL 8 f 1kHz BW 22kHz HP Mode 4 BW 22kHz LS Mode 1 11 SNAA043A October...

Страница 12: ...ed for extra headphone output attenuation Table 4 Output Mode Selection 1 Output Mode MC3 MC2 MC1 MC0 Handsfree Mono Output Right HP Output Left HP Output Number 0 0 0 0 0 SD SD SD 1 0 0 0 1 2 GM M SD...

Страница 13: ...0 1 0 13 5 19 5 12 0 1 0 1 1 12 18 13 0 1 1 0 0 10 5 16 5 14 0 1 1 0 1 9 15 15 0 1 1 1 0 7 5 13 5 16 0 1 1 1 1 6 12 17 1 0 0 0 0 4 5 10 5 18 1 0 0 0 1 3 9 19 1 0 0 1 0 1 5 7 5 20 1 0 0 1 1 0 6 21 1 0...

Страница 14: ...olling microcontroller and the slave is the LM49100 The I2 C address for the LM49100 is determined using the ADDR pin The LM49100 s two possible I2 C chip addresses are of the form 111110X10 binary wh...

Страница 15: ...I2 C Bus Format Figure 20 I2 C Timing Diagram 15 5 I2 C Interface Power Supply Pin VDDI2 C The LM49100 s I2 C interface is powered up through theVDD I2 C pin The LM49100 s I2 C interface operates at...

Страница 16: ...he single ended configuration its differential output doubles the voltage swing across the load Theoretically this produces four times the output power when compared to a single ended amplifier under...

Страница 17: ...emperature If these measures are insufficient a heat sink can be added to reduce JA The heat sink can be created using additional copper area around the package with connections to the ground pin s su...

Страница 18: ...ess shutdown function As discussed above choosing CIN no larger than necessary for the desired bandwidth helps minimize clicks and pops CB s value should be in the range of 4 to 5 times the value of C...

Страница 19: ...y 18 Revision History Rev Date Description 1 0 10 1907 Initial release 19 SNAA043A October 2007 Revised May 2013 AN 1622 LM49100 Evaluation Board Submit Documentation Feedback Copyright 2007 2013 Texa...

Страница 20: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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