Texas Instruments AFE5807EVM, Руководство пользователя, Страница: 20 / 36

P1
USB1
JP6
J7 J5 J3 J1
J8 J6
J4
J2
JP3
JP1
JP2
JP18
TP1
TP33VA
TP2
TP18VD
TP4
TP5V
TP -5V
TP3
TP33VD
Board Configuration
www.ti.com
12 Board Configuration
12.1 Input/Output, Power Supply, and USB
Figure 11. I/O, PWR, and USB Connector
Table 2. Input/Output, Power, and USB
Connector Description
J1 through J8 Analog Input signals for Ch1 through Ch8. Connect to a signal generator. A bandpass filter must be applied
between the generator and the SMA to get a better result. (See
Figure 1 .)
P1/JP6 P1 is the +5-V and – 5-V power supply connector. JP6 is the test point for +5-V/-5-V power supply.
JP3 Onboard 5-V enable. Set up as Figure 2 is a must to use onboard 5-V supply.
XP-5V -5-V supply test point.
TP5V +5-V supply test point.
JP1 O1.8-V enable. Set up as shown in Figure 2 ; required to use the o1.8 V.
JP2 Onboard 3.3-VA enable. Set up as shown in Figure 2 ; required to use the onboard 3.3 V.
TP18VD +1.8-VD supply test point.
TP33VD +3.3-VD supply test point.
TP33VA +3.3-VA supply test point.
TP1 through TP4 Ground test points.
USB1 USB interface connector
JP18 Test points for USB data bus: From pin 1 to pin 9 the signals are: D0, D4, D2, D1, D7, D5, D6, and D3
20 AFE5807/08EVM (Rev D) Evaluation Module SLOU309 – December 2010
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated