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Output Connectors
2-5
Board Configuration
2.1.6
Output Connectors
The outputs from the FPGA are not labeled for LSB and MSB. This is because
of the capability of the ADS527x data converters to switch between MSB first
or LSB first for the output data. This configuration is accessed in the internal
registers of the ADS527x through a serial interface. Refer to the respective
ADS527x datasheet and the ADS527xEVM for more details. If the standard
configuration for the data converter is used, then the following diagram can be
used for capturing the data.
Figure 2−4.
Output Connectors for the ADSDeSer-50EVM
GND
MSB
LSB
The next diagram shows the orientation of the ground connections with re-
spect to the board layout.
Figure 2−5.
Orientation of Ground Connections for the ADSDeSer-50EVM
GND
GND
GND
GND
GND
GND
GND
GND
FPGA
GND
CLK
Содержание ADSDeSer-50EVM
Страница 1: ...January 2004 User s Guide SBAU091 High Speed Converter Products...
Страница 19: ...Board Layout 3 2 3 1 Board Layout Figure 3 1 ADSDeSer 50EVM Layer 1 Top...
Страница 20: ...Board Layout 3 3 Schematic and Layout Figure 3 2 ADSDeSer 50EVM Layer 2 Power...
Страница 21: ...Board Layout 3 4 Figure 3 3 ADSDeSer 50EVM Layer 3 Mid Signal...
Страница 22: ...Board Layout 3 5 Schematic and Layout Figure 3 4 ADSDeSer 50EVM Layer 4 Ground...
Страница 23: ...Board Layout 3 6 Figure 3 5 ADSDeSer 50EVM Layer 5 Bottom...