Texas Instruments ADSDeSer-50EVM, Руководство пользователя, Страница: 10 / 25

Introduction
1-2
1.1 Introduction
The ADSDeSer-50EVM is designed to interface to the TI low voltage differen-
tial signal (LVDS) output data converters with an operating frequency of up to
50MHz and up to eight simultaneous data channels. The ADSDeSer-50EVM
provides an easy way to examine the serialized data output from the serialized
LVDS data converters by deserializing the data and converting to a standard
parallel data port. Since there is no clock embedded, a synchronous clock out-
put is provided separately, along with the eight channels of data.
The ADSDeSer-50EVM evaluation board will support the analog-to-digital
converter (ADC) models listed in Table 1−1.
Table 1−1. A/D Converter Models Supported by the ADSDeSer-50EVM
Model Features LVDS Channel Data Rate
ADS5270 12-bit, 40MSPS, 8-Channel 480MBPS
ADS5271 12-bit, 50MSPS, 8-Channel 600MBPS
ADS5275 10-bit, 40MSPS, 8-Channel 480MBPS
ADS5276 10-bit, 50MSPS, 8-Channel 600MBPS
1.2 Features
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Deserialize up to eight simultaneous channels of 10- and 12-bit data.
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Operates with LVDS output data converters up to 50MSPS.
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Clock signal is synchronous with data output.