Texas Instruments ADS8350EVM-PDK, Руководство пользователя

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JP9 / JP10 (Open)
+2.5 V
AINP
AINN
8200 pF
10
OPA836
1 k
5 V
1 k
10
+
Å
+2.5 V
0.2 V
4.8 V
2.5 V
AIN_x
0.2 V
4.8 V
2.5 V
Unipolar Input Signal
+2.5 V
AINP
AINN
8200 pF
10
OPA836
1 k
5 V
1 k
10
+
Å
+1.25 V
0.2 V
4.8 V
2.5 V
JP9 / JP10 (CLOSED)
AIN_x
±
2.3 V
+2.3 V
0 V
Bipolar Input Signal
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EVM Analog Interface
2.1 Bipolar Input Signal Configuration
When jumpers JP9 and JP10 are closed, the inverting amplifier positive input is biased with +1.25 V. This
bias voltage is created by dividing the ADS8350EVM 2.5-V onboard reference by two. The bias voltage at
the input results in a 2.5-V offset at the amplifier output. In this configuration, apply a bipolar input signal
with 0-V common-mode voltage.
To keep the OPA836 distortion as low as possible, the input signal swing is limited from –2.3 V to +2.3 V,
as shown in
Figure 2 .
Figure 2. Bipolar Input Signal Configuration
2.2 Unipolar Input Signal Configuration
When jumpers JP9 and JP10 are open, the inverting amplifier positive input is biased with +2.5 V. This
bias voltage is created using the ADS8350EVM 2.5-V onboard reference. In this configuration, apply a
unipolar input signal with 2.5-V common-mode voltage. To keep the OPA836 distortion as low as possible,
the input signal swing is limited from +0.2 V to +4.8 V, as shown in
Figure 3 .
Figure 3. Unipolar Input Signal Configuration
5 SBAU218A – April 2014 – Revised October 2014 ADS8350EVM-PDK
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