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ADS1278EVM Hardware Details

ADS1278EVM Hardware Details

The ADS1278EVM is designed to easily interface with multiple control platforms. Dual-row, header/socket
combinations at J3, J4, and J5 allow connection to external circuitry for evaluation and debug.

5.1

Jumpers and Switches

Jumpers and Switches function shown in table below

Table 5. Jumper and Switch Descriptions

Jumper/Switch

Functions

Descriptions

FSYNC/DRDY Source

Short to select FSR as the source

(1)

FSYNC/DRDY Source

Short to select FSX as the source

(1)

Short - input buffers powered down

Analog Input Buffers Powerdown

Open - input buffers powered up

Short - Software control

Hardware/Software Control of Clock Source

Open - Hardware control

Internal/External Clock Select (Hardware

Short - External clock source selected

control)

Open - Internal clock source selected

Hardware control for GPIO2 (set to OFF position for use with

GPIO2

software)

Hardware control for GPIO3 (set to OFF position for use with

GPIO3

software)

Hardware control for GPIO4 (set to OFF position for use with

GPIO4

software)

Hardware control for CLKDIV (set to OFF position for use with

CLKDIV

software)

Hardware control for GPIO0 (set to OFF position for use with

GPIO0

software)

Hardware control for GPIO1 (set to OFF position for use with

GPIO1

software)

Hardware control for PWDN1 (set to OFF position for use with

Powerdown Channel 1

software)

Hardware control for PWDN2 (set to OFF position for use with

Powerdown Channel 2

software)

Hardware control for PWDN3 (set to OFF position for use with

Powerdown Channel 3

software)

Hardware control for PWDN4 (set to OFF position for use with

Powerdown Channel 4

software)

Hardware control for PWDN5 (set to OFF position for use with

Powerdown Channel 5

(2)

software)

Hardware control for PWDN6 (set to OFF position for use with

Powerdown Channel 6

(2)

software)

Hardware control for PWDN7 (set to OFF position for use with

Powerdown Channel 7

(2)

software)

Hardware control for PWDN8 (set to OFF position for use with

Powerdown Channel 8

(2)

software)

Selects source for reference - buffered on-board ref or header

Converter Reference source selector

(external)

Selects Channel 4 input source - header or input buffer

Channel 4 Input source selector

Left - header

Right - input buffer

Selects Channel 3 input source - header or input buffer

Channel 3 Input source selector

Left - header

Right - input buffer

(1)

Only one of FSYNC/DRDY signals should be connected at a time (J1 or J2).

(2)

Channels 4-8 only available for ADS1278 and ADS1178.

SBAU197

–

February 2012

ADS1x7xEVM-PDK

Submit Documentation Feedback

2012, Texas Instruments Incorporated

Содержание ADS1 7 EVM-PDK Series

Страница 1: ...x devices This document includes an EVM QuickStart hardware and software details bill of materials and schematic The following related documents are available through the Texas Instruments web site at http www ti com Table 1 EVM Compatible Device Data Sheets Device Literature Number Device Literature Number ADS1278 SBAS367 OPA1632 SBOS286 ADS1274 SBAS367 SN74LVC2G157 SCES207 ADS1178 SBAS373 TPS730...

Страница 2: ...of Tables 1 EVM Compatible Device Data Sheets 1 2 Default Jumper Switch Configuration 4 3 Critical Connections 6 4 Operating Modes Clock Frequency 10 5 Jumper and Switch Descriptions 11 6 J3 Primary Analog Interface Pinout 13 7 J1 Secondary Analog Interface Pinout 13 8 J5 Serial Interface Header 14 9 J2 DOUTx Header 15 10 J3 Configuration Power Supply Input 15 11 ADS1x7xEVM Bill of Materials 16 2 ...

Страница 3: ...ystal oscillator GPIO access Compatible with the TI Modular EVM System ADS1x7xEVM PDK includes the ADS1x7xEVM board with the DSP based MMB0 motherboard that can be used with ADCPro to quickly evaluate the device This manual covers the operation of the ADS1x7xEVM PDK Throughout this document the abbreviation EVM and the term evaluation module are synonymous with the ADS1178EVM ADS1278EVM ADS1174EVM...

Страница 4: ...F Down Powerdown channel DIP switches Hardware control Mode Format and CLKDIV DIP switches Hardware S2 All OFF Down control S3 INT Right On board Voltage Reference Selected Channel 4 header connected to converter not S4 Header connected to converter Left buffered Channel 3 header connected to converter not S5 Header connected to converter Left buffered S6 FS Down FS serial interface format Channel...

Страница 5: ... EVM 2 Using ADCPro HW SW Installation Manual verify the MMB0 jumpers are in the default position and install ADCPro and ADS1278EVM plug in software Complete hardware connection and driver installation as part of ADCPro HW SW Installation Manual using the below settings MMB0 J13A Open MMB0 J13B Short No additional power connections are required 3 Plug the ADS1278EVM onto the MMB0 if not already co...

Страница 6: ... J1 and provisions are provided to buffer these signals before being connected to the converter Switches S4 S5 and S7 S8 control whether the buffered or unbuffered signal is connected to the ADS1278 Channels 5 8 connect to J3 and have an RC filter available to filter the input before connecting to the converter Channels 5 8 do not have provisions for buffering the signal 3 2 Digital Control The di...

Страница 7: ...78EVM ADS1278EVM correspond to settings described in the ADS1278 product data sheet product data sheet 4 1 Top Level Controls You can adjust the ADS1278EVM settings when you are not acquiring data During acquisition all controls are disabled and settings may not be changed The effective data rate of the ADS1278 depends upon settings of the Clock Freq and Operating Mode The Data Rate indicator in t...

Страница 8: ...enable control via CH1 through CH8 selector switches All Channels Enabled and All Channels Disabled turn all the selector switches either ON or OFF 4 3 Settings Tab The Settings tab allows for the selection of the various clock frequencies operating mode data format and other settings 8 ADS1x7xEVM PDK SBAU197 February 2012 Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated...

Страница 9: ...red value in the Clock Frequency indicator The Operating Mode control allows selection of the converter operating mode High Speed High Resolution Low Power or Low Speed The CLKDIV control can be set to 0 or 1 The Data Output Format allows selection of the data output formats For the ADS1278EVM software the formats are limited to the Frame Sync TDM Format The available options select whether the so...

Страница 10: ...wer 1 27 Low Power 0 13 5 Low Speed 1 27 Low Speed 0 5 4 4 4 About Tab The About tab provides information on the EVM hardware and software versions Plug in Version is software version of ADCPro plug in Firmware Version is firmware version loaded and running on the processor 10 ADS1x7xEVM PDK SBAU197 February 2012 Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporated ...

Страница 11: ...h GPIO0 software Hardware control for GPIO1 set to OFF position for use with GPIO1 software Hardware control for PWDN1 set to OFF position for use with Powerdown Channel 1 software Hardware control for PWDN2 set to OFF position for use with Powerdown Channel 2 software Hardware control for PWDN3 set to OFF position for use with Powerdown Channel 3 software Hardware control for PWDN4 set to OFF pos...

Страница 12: ...l be switched down toward the center of the board Failure to do so may damage the EVM 5 3 Clock Source The ADS1278 clock can come from one of several sources the onboard 27MHz crystal oscillator a clock supplied by a processor on the TOUT pin J4 17 or an external clock source connected between J4 17 TOUT and J4 18 DGND If the onboard 27MHz oscillator is selected the device can be run in high speed...

Страница 13: ...on Signal Pin Number Signal Description Not used for this design Not Connected J3 1 1 J3 2 Not Connected Not used for this design Analog Input Channel 8 Negative ANN8 J3 3 J3 4 ANP8 Analog Input Channel 8 Positive Analog Input Channel 7 Negative ANN7 J3 5 J3 6 ANP7 Analog Input Channel 7 Positive Analog Input Channel 6 Negative ANN6 J3 7 J3 8 ANP6 Analog Input Channel 6 Positive Analog Input Chann...

Страница 14: ...mpatible processor not supporting the frame sync mode If this format is selected keep in mind that the high speed mode will not operate at full speed 32 768MHz because of the limitations outlined in the device product data sheet 5 5 2 Serial Data Interface J5 This header socket provides access to the digital control and serial data pins of the ADC All logic levels on J5 are 3 3V CMOS except for th...

Страница 15: ...to reference designator 5 6 Power Supply Header J3 J3 is the power supply input connector Table 10 lists the configuration details for J3 Supplies of 1 8V 3 3V and 5 0V are required for operation of the EVM When using the EVM as part of the EVM PDK these voltages are generated by the MMB0 and no external supplies are required For operation as a stand alone EVM the power supplies should be connecte...

Страница 16: ...25V TDK C1608X7R1E152M C47 48 C52 53 8 1 1 5n C30 37 8 3 0 CM1 3 Resistor Chip 1 4W Vishay Dale CRCW06030000Z0EAHP 9 1 1 J1 Top Header SMT Vert 5x2 pin 100mil spacing Samtec TSM 105 01 T DV P 10 1 J5 Top Header SMT Vert 5x2 pin 100mil spacing Samtec TSM 105 01 T DV P 11 1 J5 Bottom Header SMT Vert 5x2 pin 100mil spacing Samtec SSW 105 22 F D VS K 12 1 J2 Header SMT Vert 4x2 pin 100mil spacing Samt...

Страница 17: ... R R Input R R Output Fully TI THS4521DGK Differntial Amplifier 37 1 2 U4 IC Quad Octal Simultaneous Sampling TI ADS1278PAP 24 Bit A D Converter 38 1 U6 Single 2 line To 1Line Data TI SN74LVC2G157DCT Selector Multiplexer 39 1 U10 IC Single Inverter TI SN74LVC1G04DBV 40 1 U12 IC single Positive Edge Triggered D Type TI SN74LVC2G74DCU Flip Flop With Clear And Reset 41 1 U13 IC Configurable Multiple ...

Страница 18: ...32 FORMAT0 33 MODE1 34 MODE0 35 PWDN8 36 PWDN7 37 PWDN6 38 PWDN5 39 PWDN4 40 PWDN3 41 PWDN2 42 PWDN1 43 AGND 44 AVDD 45 AINP8 46 AINN8 47 AINP7 48 AINN7 49 AINP6 50 AINN6 51 AINP5 52 AINN5 53 AVDD 54 AGND 55 VCOM 56 VREFP 57 VREFN 58 AGND 59 AGND 60 AVDD 61 AINP4 62 AINN4 63 AINP3 64 AINN3 65 PWPD U4 REFP_HDR REFN_HDR REFP REFN AGND AVDD REF_CKT 7 8 9 10 11 12 4 5 6 1 2 3 S6 SW_SSB42 6 5 7 OUTB U2...

Страница 19: ...e Drawn by 3 Engineer Rev 1 E G Hupp Number ads1278evm sch G Hupp 4 Texas Instruments 07APR11 R1 2k R3 47 C2 150n C3 0 1u S3 C7 10u R2 1k C1 100u 1 DNC 2 VIN 3 TEMP 4 GND 5 TRIM 6 VOUT 7 NC 8 DNC U1 C5 10u C4 1u 2 3 1 OUTA 4 V 8 V U2 A C6 1u AVDD 1 2 AGND 1 2 3 REFN 1 REFP 1 REFP_HDR 1 2 REFN_HDR 1 2 ...

Страница 20: ...n R27 1k C21 0 1u C17 0 1u S4 S5 C18 2 2n C16 2 2n 8 VIN 2 VOCM 1 VIN 6 VS 3 VS 4 VOUT 5 VOUT 7 PD U9 R37 49 9 R36 49 9 R39 1k C48 1 5n R43 1k R42 1k C47 1 5n R38 1k 8 VIN 2 VOCM 1 VIN 6 VS 3 VS 4 VOUT 5 VOUT 7 PD U3 R14 49 9 R15 49 9 R17 1k C14 1 5n R20 1k R21 1k C15 1 5n R18 1k C49 0 1u R29 100k 1 2 JP3 C55 0 1u C13 0 1u C39 0 1u C22 0 1u TP10 TP9 ANP1 ANP2 ANN1 ANN2 CHAN P2 CHAN P1 ANN2 REFN_HD...

Страница 21: ...2 A 100k 2 1 15 2 3 1 14 2 4 1 13 2 5 1 12 2 6 1 11 2 7 1 10 2 8 1 9 2 1 1 16 2 R33 A 100k 2 1 15 2 3 1 14 2 4 1 13 2 5 1 12 2 C58 0 1u 1 7 5 4 2 8 3 6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 S1 6 5 4 3 2 1 1 2 3 4 5 6 7 8 9 10 11 12 S2 6 1 11 2 1 2 3 4 5 6 7 8 9 10 J1 C9 2 2n R5 0 C31 1 5n R4 0 C30 1 5n R7 0 R6 0 R9 0 R8 0 R11 0 R10 0 C33 1 5n C32 1 5n C35 1 5n C34 1 5n C37 1 5n C36 1 5n C8 2 2n C...

Страница 22: ...ency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES 003 rules which are designed to provide reasonable protection against radio frequency interference Operation of the equipment may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required t...

Страница 23: ...o interference to other users the antenna type and its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful communication This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna t...

Страница 24: ...r you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product Also please do not transfer this product unless you give the same notice above to the transferee Please note that if you could not follow the instructions above you will be subject to penalties of Radio Law of Japan Texas Instruments Japan Limited address 24 1 Nishi Shin...

Страница 25: ... property damage personal injury or death If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and intended loads Any loads applied outside of the specified output range may result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Plea...

Страница 26: ...ency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES 003 rules which are designed to provide reasonable protection against radio frequency interference Operation of the equipment may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required t...

Страница 27: ... its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful communication This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this l...

Страница 28: ...er you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product Also please do not transfer this product unless you give the same notice above to the transferee Please note that if you could not follow the instructions above you will be subject to penalties of Radio Law of Japan Texas Instruments Japan Limited address 24 1 Nishi Shi...

Страница 29: ... property damage personal injury or death If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and intended loads Any loads applied outside of the specified output range may result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Plea...

Страница 30: ...regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures monitor failures and their consequence...

Страница 31: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments ADS1278EVM PDK ADS1178EVM PDK ...

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