TVME8240 User Manual Issue 1.2.9
Page 20 of 70
3.5 Address Map – Utility Register Detail
Address
Size
(Byte)
Register Name
0xFFE4_0000 1
CONTROL
0xFFE4_0001 1
STATUS
0xFFE4_0002 1
Reserved
0xFFE4_0003 1
LED
Table 3-7 : Address Map – Utility Register Detail
3.5.1 Control Register (0xFFE4_0000)
Bit
Name
Access
Reset
Function
0
(MSB)
BOARD_RST R/W
0
0: Normal Board Operation
1: Assert Board Reset
1 I2C_EEP_WE
R/W
0
0: I2C EEPROM Writes Disabled
1: I2C EEPROM Writes Enabled
2
MEM_FLASH_WE
R/W 0
0: Memory FLASH Writes Disabled
1: Memory FLASH Writes Enabled
3
BOOT_FLASH_WE
R/W 0
0: Boot FLASH Writes Disabled
1: Boot FLASH Writes Enabled
4 Reserved
-
-
Write as '0'
Undefined for Reads
5 VME_BERR_INT_EN
R/W 0
0: VME Bus Error Interrupt Disabled
1: VME Bus Error Interrupt Enabled
6 Reserved
-
-
Write as '0'
Undefined for Reads
7
(LSB)
Reserved -
-
Write as '0'
Undefined for Reads
Table 3-8 : Control Register
A board reset is also performed at power-up.
A board reset will perform a general board hardware reset, re-configuration of the IP FPGA, PCI
reset and CPU reset.
If the TVME8240 is the VME bus system controller, a board reset will also trigger a VME bus
system reset.
