Tews Technologies TCP460, Руководство пользователя

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TCP460 User Manual Issue 1.1 Page 4 of 32
Table of Figures
FIGURE 1-1 : BLOCK DIAGRAM......................................................................................................................5
FIGURE 2-1 : TECHNICAL SPECIFICATION...................................................................................................7
FIGURE 3-1 : CPCI/PCI INTERFACE...............................................................................................................8
FIGURE 3-2 : SERIAL CHANNEL MAPPING ...................................................................................................8
FIGURE 3-3 : SECONDARY PCI BUS OVERVIEW.........................................................................................9
FIGURE 4-1 : XR17D158 PCI HEADER .........................................................................................................10
FIGURE 4-2 : DEVICE CONFIGURATION SPACE........................................................................................11
FIGURE 4-3 : UART REGISTER SET OFFSET .............................................................................................12
FIGURE 4-4 : UART REGISTER SET ............................................................................................................12
FIGURE 4-5 : DEVICE CONFIGURATION REGISTERS ...............................................................................13
FIGURE 4-6 : UART CHANNEL CONFIGURATION REGISTERS ................................................................14
FIGURE 4-7 : CONFIGURATION EEPROM TCP460-XX ..............................................................................16
FIGURE 4-8 : PHYSICAL CONFIGURATION EEPROM DATA OF UART 1 .................................................17
FIGURE 4-9 : PHYSICAL CONFIGURATION EEPROM DATA OF UART 2 .................................................18
FIGURE 5-1 : UART INTERFACE MAPPING.................................................................................................19
FIGURE 6-1 : UART BAUD RATE PROGRAMMING .....................................................................................20
FIGURE 7-1 : TCP460-X0 PIN ASSIGNMENT FRONT PANEL I/O CONNECTOR ......................................23
FIGURE 7-2 : TCP460-X1 PIN ASSIGNMENT FRONT PANEL I/O CONNECTOR ......................................24
FIGURE 7-3 : TCP460-X2 PIN ASSIGNMENT FRONT PANEL I/O CONNECTOR ......................................25
FIGURE 7-4 : TCP460-X3 PIN ASSIGNMENT FRONT PANEL I/O CONNECTOR ......................................26
FIGURE 7-5 : TCP460-X4 PIN ASSIGNMENT FRONT PANEL I/O CONNECTOR ......................................27
FIGURE 7-6 : PIN ASSIGNMENT TCP460-20 COMPACTPCI BACK I/O CONNECTOR (J2)......................28
FIGURE 7-7 : PIN ASSIGNMENT TCP460-21 COMPACTPCI BACK I/O CONNECTOR (J2)......................29
FIGURE 7-8 : PIN ASSIGNMENT TCP460-22 COMPACTPCI BACK I/O CONNECTOR (J2)......................30
FIGURE 7-9 : PIN ASSIGNMENT TCP460-23 COMPACTPCI BACK I/O CONNECTOR (J2)......................31
FIGURE 7-10 : PIN ASSIGNMENT TCP460-24 COMPACTPCI BACK I/O CONNECTOR (J2)....................32