73S8023C Demo Board User Manual
UM_8023C_027
12
Rev. 1.3
4 Design Considerations
4.1 General Layout Rules
•
Route the auxiliary signals away from card interface signals.
•
Keep the CLK signal as short as possible and with few bends in the trace. Keep the route of the CLK
trace to one layer (avoid vias to other plane). Keep the CLK trace away from other traces, especially
RST and VCC. Filtering of the CLK trace is allowed for noise purpose. Up to 30 pF to ground is
allowed at the CLK pin of the smart card connector. In addition, the zero ohm series resistor, R7, can
be replaced for additional filtering (no more than 100
Ω).
•
Keep the VCC trace as short as possible. Make the trace a minimum of 0.5 mm thick. In addition,
keep the VCC away from other traces, especially RST and CLK.
•
Keep the trace from L1 to pin 2 of the IC as short as possible.
•
Keep the RST trace away from the VCC and CLK traces. Up to 30 pF to ground is allowed for
filtering.
•
Keep the 0.1
µ
F capacitor close to the VDD pin of the device and directly take the other end to
ground.
•
Keep the 0.1
µ
F capacitor close to the VPC pin of the device and directly take the other end to
ground.
•
Keep the 3.3
µ
F (1.0
µ
F for NDS) capacitor close to the VCC pin of the smart card connector and
directly take other end to ground.
4.2 Optimization for Compliance with EMV and NDS
The default configuration of the demo board contains a 27 pF capacitor (C12) from the CLK pin of the
smart connector to ground and a 27 pF capacitor (C13) from the RST pin of the smart connector to
ground. These capacitors serve as filters for the CLK and RST signals in the case of long traces or test
equipment perturbations. The capacitor on CLK reduces ringing on the trace, reduces coupling to other
traces and slows down the edge of the CLK signal. The capacitor on RST helps the perturbation
specification in a noisy environment. The filter capacitors can be useful in the EMV test environment and
have no effect on NDS testing.
C12 and C13 are represented on both the schematic and the BOM. These capacitors are optional filter
capacitors on the smart card lines CLK and RST, respectively for each card interface. These capacitors
may be adjusted (value not to exceed 30 pF) or removed to optimize performance in each specific
application (PCB, card clock frequency, compliance with applicable standards etc).
The default VCC capacitor of 3.3
µ
F is required to meet the dynamic VCC (smart card supply) transient
current requirement as specified in the EMV2000 version 4.0 specification. For compliance with NDS, a
smaller capacitor of 1
µ
F is required to meet the activation discharge time specification.
