Digital Panel Design Demonstration
7
Chapter
3
Chapter 3
Digital Panel Design
Demonstration
This chapter illustrates how to exercise the digital panel reference design
provided with the kit. Users can follow the instructions in this chapter to build a 3.6
inch TV player (DE2 user only) and pattern generator using the DE2/DE1 in 5
minutes.
3-1
Demonstration Setup
The Demonstration configuration is illustrated as Figure 3.1. The YUV 4:2:2 data
is sent from TV decoder to the cyclone II 2C35 FPGA. The FPGA on the
DE2/DE1 board is handling image processing part and set the LCD module
control register to display on the TRDB_LCM.
Figure 3.1. The TV player Demo configuration setup
