SoCKit User Manual
1
www.terasic.com
December 1, 2015
CONTENTS
CHAPTER 1 SOCKIT DEVELOPMENT KIT ............................................................................................... 4
1.1 Package Contents ................................................................................................................................. 4
1.2 SoCKit System CD ............................................................................................................................... 5
1.3 Getting Help ......................................................................................................................................... 5
CHAPTER 2 INTRODUCTION OF THE SOCKIT BOARD ......................................................................... 6
2.1 Layout and Components ....................................................................................................................... 6
2.2 Block Diagram of the SoCKit Board ................................................................................................... 9
CHAPTER 3 USING THE SOCKIT BOARD ............................................................................................. 11
3.1 Board Setup Components ................................................................................................................... 11
3.1.1 JTAG Chain and Setup Switches ................................................................................................... 11
3.1.2 FPGA Configuration Mode Switch ................................................................................................ 13
3.1.3 HPS BOOTSEL and CLKSEL Setting Headers ............................................................................ 14
3.1.4 HSMC VCCIO Voltage Level Setting Header ............................................................................... 16
3.2 Board Status Elements ........................................................................................................................ 17
3.3 Board Reset Elements ........................................................................................................................ 17
3.4 Programming the Quad-Serial Configuration Device ........................................................................ 19
3.5 Clock Circuits ..................................................................................................................................... 20
3.6 Interface on FPGA ............................................................................................................................. 21
3.6.1 User Push-buttons, Switches and LED on FPGA .......................................................................... 21
3.6.2 HSMC connector
............................................................................................................................ 24
3.6.3 Audio CODEC ............................................................................................................................... 27
3.6.4 VGA ............................................................................................................................................... 28
3.6.5 IR Receiver .................................................................................................................................... 31
3.6.6 DDR3 Memory on FPGA .............................................................................................................. 32
