GS2101M Low Power Wi-Fi Module Hardware User Guide
1VV0301395 Rev 3.0
Page
26
of
53
2017-11-13
The RTC contains a low-power 32.768KHz RC oscillator which provides fast startup at
first application of RTC power. It also supports an optional 32.768KHz crystal oscillator
which can be substituted for the RC oscillator under software control. In normal
operation, the RTC is always powered up.
The standby programmable counter is 48-
bits and provides up to 272 years’ worth of
standby duration. For the RTC_IO pin, the programmable embedded counter (32-bit) is
provided to enable periodic wake-up of the remainder of the external system, and
provide a 1.5 days’ max period. The RTC_IO pin can be configured as input (ALARM) or
output (WAKE UP) pin.
The RTC includes a Power-On Reset (POR) circuit, to eliminate the need for an external
component. The RTC contains low-leakage non-volatile (battery-powered) RAM, to
enable storage of data that needs to be preserved. It also includes a brown-out detector
that can be disabled by SW.
2.1.6.2.
Real Time Clock Counter
•
The Real Time Counter features:
–
48-bit length (with absolute duration of 272 years).
–
Low-power design.
•
This counter is automatically reset by power-on-reset.
•
This counter wraps around
(returns to “all-0” once it has reached the
highest possible “all-1” value).
2.1.6.3.
RTC I/O
There is one (1) RTC I/O that can be used to control external devices, such as sensors
or wake up the module based on external events or devices.
2.1.7.
GS2101M Peripherals
2.1.7.1.
SDIO Interface
The SDIO interface is a full / high speed SDIO device (slave). The device supports SPI,
1-bit SD and 4-bit SD bus mode. The SDIO block has an AHB interface, which allows the
CPU to configure the operational registers residing inside the AHB Slave core. The CIS
and CSA area is located inside the internal memory of CPU subsystem. The SDIO
Registers (CCCR and FBR) are programmed by both the SD Host (through the SD Bus)
and CPU (through the AHB bus) via Operational registers. The SDIO block implements
the AHB master to initiate transfers to and from the system memory autonomously
.
During the normal initialization and interrogation of the card by the SD Host, the card will
identify itself as an SDIO device. The SD Host software will obtain the card information in a
tuple (linked list) format and determine if that card’s I/O function(s) are acceptable to
activate. If the Card is acceptable, it will be allowed to power up fully and start the I/O
function(s) built into it.
The SDIO interface implements Function 1 in addition to the default Function 0. All
application data transfers are done through the Function 1
The primary features of this interface are
•
Meets SDIO card specification version 2.0.
•
Conforms to AHB specification.
•
Host clock rate variable between 0 and 40 MHz
Содержание GainSpan GS2101M
Страница 1: ...GS2101M Low Power Wi Fi Module HW User Guide 1VV0301395 Rev 3 0 2017 11 13...
Страница 53: ......