S50 Hardware User Guide
1VV0301505 Rev. 1
Page
15
of
53
2018-03-02
Serial Interface
The serial interface of S50 is a high-speed UART interface supporting RTS/CTS
flow control and interface-up/down mechanism according to the UICP protocol (refer to [2]).
•
Electrical interfacing is at CMOS levels (defined by VSUP; see chapter 6.3.1)
•
Transmission speeds are 9600 – 921600 bps and 1Mbps (asynchronous)
•
Character representation: 8 Bit, no parity, 1 stop bit (8N1)
•
Hardware flow-control with RTS and CTS (active low)
Transmission speed may be limited by firmware. See corresponding
AT command reference [3] for further information.
4.3.1.
Basic Serial Interface
The basic serial interface (with RTS/CTS flow control) uses only four signal lines (UART-
RXD, UART-TXD, UART-CTS#, UART-RTS#) and GND. IUR-IN# and IUR-OUT# (see
below) can be left unconnected.
S50
Host
UART-RXD
UART-TXD
UART-CTS#
UART-RTS#
GND
Figure 5: Basic Serial Interface
A pulldown resistor is programmed to CTS# if UICP is disabled.
If AT+SYSTEMOFF is issued while UICP is disabled, it is necessary
that the host keeps CTS# at logic low or leaves this pin floating.
Otherwise the supply current drawn in the deep sleep mode increases
by VSUP/13kΩ, which would be at 3V 231µA, 770 times the expected
0,3µA. This would reduce the life time of a coin cell significantly.
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