S42/Central Software User Guide
1VV0301318 Rev. 3
– 2018-08-31
Reproduction forbidden without written authorization from Telit Communications S.p.A.- All Rights Reserved.
Page 44 of 66
6.5.
Example of UICP Usage
The following examples show the state change between the S42/Central and the host.
The scenario here might be that both devices use the "interface down" state to drive the MCU
into some kind of power saving mode that allows to "wake up" the MCU with external GPIO
signals.
6.5.1.
State Change from "interface up" to "interface down"
Host and S42/Central are in the state “interface up” and exchange bidirectional data.
After the host has send all data and is idle for
t1
in its Tx direction it signals the
S42/Central that it is allowed to go to “interface down” state by de-asserting IUR-
OUT# signal.
Parallel to that UICP signaling from host to S42/Central the S42/Central
has send all data as well and is idle for
t1
in its Tx direction, so it signals the host that it is
allowed to go to “interface down” state by de-asserting IUR-OUT# signal.
The host and the S42/Central each wait for a maximum time
t2
to detect the de-
asserted IUC-IN# signal. After receiving this input change via the IUC-IN# signal both devices
may change from state “pending interface down” to state “interface down”.
Both UICP signaling sequences proceed in parallel until host and S42/Central
interfaces are in “interface down” state.
IUR-OUT#
IUR-IN#
IUC-OUT#
(UART-RTS)
IUC-IN#
(UART-CTS)
UART-TXD
UART-RXD
S42 Rx-IF State
S42 Tx-IF State
S42 Signals:
IUR-IN#
IUR-OUT#
IUC-IN#
(UART-CTS)
IUC-OUT#
(UART-RTS)
UART-RXD
UART-TXD
HOST UICP Tx-IF State
HOST UICP Rx-IF State
HOST-Signals:
data
interface up
pending interface down
interface down
data
interface up
pending interface down
interface down
data flow control
data flow control
t1
t1
t2
t2
active
active
active
active
inactive
inactive
inactive
inactive
