Q-Lite Satellite Modem Installation and Operating Handbook
9-4
The input clock/data phase is selected automatically, reporting a
Data Marginal
warning
whenever it has to switch phase. If the modem reports
Data Marginal
frequently then this is
not a modem fault but an indication that there is a clocking problem external to the modem
(i.e. changing clock/data phase, a problem which would otherwise have caused untraceable
data errors). With the Tx Clocking Set to
Tx Clock In
the
Data In
signal is checked against
the
Clock In
signal. With the Tx Clocking Set to
Internal
or
Rx
the
Data In
signal is checked
against the
Int` Tx Clk Out
signal.
All signals are balanced, differentially driven and received at standard ECL levels. The
loopbacks LA and LB provided are direct supersets of the EIA signals LL (Local Loopback)
and RL (Remote Loopback) Loopback LC is an optional request signal from DCE to DTE,
to request that the DTE provides a loopback path to the DCE.
By selecting
Advanced
it is possible to configure the modem to raise an alarm if either the
Sig` Valid In
line (RS) or
Device (DTE) Ready In
line (TR) switch to the inactive state. It is
also possible to configure the Tx carrier to be switched on and off by the
Sig= Valid In
line
(RS) by selecting
Edit->Tx->Carrier
and selecting
RTS enabled
.
Please note: Although the HSSI cable uses the same connector as the SCSI-2
specification, the cable impedances of HSSI and SCSI-2 cables are different. SCSI-2
cables can be as low as 70 Ohms, whereas HSSI cables are specified at 110 Ohms. As a
result, cables made to SCSI-2 specifications may not work correctly with HSSI.
Incompatibilities will be more apparent with longer cable lengths.
EIA-530 Interface in RS422 Mode
The EIA-530 interface is used in RS422 mode as follows.
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