Tektronix TLA7XM, Руководство пользователя

Страница: 34 / 190

Specifications
TLA721 Benchtop & TLA7XM Expansion Mainframe Service Manual
1- 9
Table 1- 5: Backplane latencies
Characteristic Benchtop mainframe Expansion mainframe
System trigger and external signal input latencies
2
(Typical)
External system trigger input to LA probe tip
4
--266 ns --230 ns
External signal input to LA probe tip via Signal 3, 4
5
--212 ns + Clk --176 ns + Clk
External signal input to LA probe tip via Signal 1, 2
5, 6
--208 ns + Clk --187 ns + Clk
External system trigger input to DSO probe tip
4
--25 ns --11 ns
System trigger and external signal output latencies
1
(Typical)
LA probe tip to external system trigger out 376 ns + SMPL 412 ns + SMPL
LA probe tip to external signal out via Signal 3, 4
3
OR function 366 ns + SMPL 402 ns + SMPL
AND function 379 ns + SMPL 415 ns + SMPL
LA probe tip to external signal out via Signal 1, 2
3,6
normal function 364 ns + SMPL 385 ns + SMPL
inverted logic on backplane 364 ns + SMPL 385 ns + SMPL
DSO probe tip to external system trigger out 68 ns 104 ns
DSO Probe tip to external signal out via Signal 3, 4
3
OR function 65 ns 101 ns
AND function 75 ns 111 ns
DSO probe tip to external signal out via Signal 1, 2
3,6
normal function 68 ns 89 ns
inverted logic on backplane 71 ns 92 ns
Inter-module latencies (Typical)
LA to DSO inter-module system trigger (TTLTRG&)
1,4
(LA: Trigger All Modules
DSO: Wait for System Trigger)
358 ns + SMPL 394 ns + SMPL
LA to LA inter-module system trigger (TTLTRG7)
1,4
(LA2: Trigger All Modules
LA1: Do Nothing)
66 ns + SMPL 102 ns + SMPL
LA to DSO inter-module ARM (TTLTRG2,4,5,6)
1
360 ns + SMPL 396 ns + SMPL
LA to LA inter-module ARM (TTLTRG2,4,5,6)
1,5
108 ns + SMPL + Clk 144 ns + SMPL + Clk
LA to LA inter-module via Signal 1, 2 (ECLTRG0,1)
1,5, 6
(LA2: Trigger, then set Signal 2
LA1: If Signal 2 is true, trigger)
116 ns + SMPL + Clk 137 ns + SMPL + Clk
LA to LA inter-module via Signal 3, 4 (TTLTRG0,1)
1,5
(LA2: Trigger, then set Signal 3
LA1: If Signal 3 is true, trigger)
116 ns + SMPL + Clk 152 ns + SMPL + Clk