Tektronix RSA3408B, Руководство по обслуживанию

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Theory of Operation
2- 4
RSA3408B Analyzer Service Manual
The Trigger Detector achieves real-time frequency trigger function. When the
Frequency Mask Trigger function is activated, window function operation is
executed to the input signal first. To accelerate the operation, data are divided
into two groups: the odd frame data and the even frame data. With pipeline-con-
nected FFT processors, real-time FFT is applied to these groups of data. After
being converted into frequency domain, the data are further converted into the
power domain with a pipeline-connected quadrature-to-polar coordinates
converter. After comparison with the reference data, the trigger board outputs the
trigger detect signal. When the Power Trigger function is activated, window
function operation and FFT operation mentioned above are bypassed. The data of
the time domain are converted into the power domain and sent to Trigger
Comparator.
The Acquisition Memory saves time domain data separated into I and Q signals.
The A42 DIFP board also interfaces between the data block and Microsoft
Windows system. I/Q data output from the digital filter is saved to the dual port
SRAM, and then transferred to SDRAM as a block of data. The memory block
of SDRAM is also connected to the PCI local bus via a different dual port
SRAM. This allows the Windows system to refer to the contents copied to this
dual port SRAM as the data on the PCI memory space. The TRIG IN and OUT
connectors located on the rear panel are connected with this board. An external
trigger signal input is used, in addition, as the timing reference signal for the
address controller. The A42 board also contains a microprocessor that controls
various software settings and various types of hardware as well as peripheral
devices such as ROM/RAM.
In the DPX spectrum mode, time-domain data from the digital down converter
goes to the proprietary DPX processor that performs real-time FFT over 50,000
times per second. The spectrum traces are accumulated in the pixel buffer
memory, where a counter is incremented each time a trace writes to a point on
the display. A color is assigned to each display point based on the value of its
counter. Thus, as acquisitions occur over time, a color-graded waveform, the
Bitmap, develops on the display that shows the frequency of data occurrence
(signal density).
Power Supply
The power supply circuit consists of two units of AC/DC Converter (Power
Supply 1 and 2) energized from AC power line, and A70 DC power board,
which regulates the output voltages of AC/DC converter units and distributes the
regulated outputs to each of the boards and fans.
Note that Power Supply 1 and 2 units have different output voltage specifica-
tions. The Power Supply 1 output voltages are +5 V / +15 V / --15 V / +24 V; the
Power Supply 2 output voltages are +5 V / +12 V / --12 V / +3.3 V.
Power Supply 1 and 2