Tektronix 2236, Инструкция по эксплуатации

Страница: 50 / 350

Theory of Operation— 2236 Service
Common-base transistors Q102 and Q103 convert dif­
ferential current from the Paraphase Amplifier into level-
shifted voltages that drive the bases of the input transistors
of U130 and the Internal Trigger circuitry. Emitter current for
the input transistors is supplied by Q114 and Q115, and the
base bias is adjusted by R111. The collector current of each
input transistor of U130 serves as emitter current for two
differential output transistor pairs. One of the collectors of
each output pair is grounded and the other provides output
drive to the Delay Line Driver. The base voltages of the
transistors with grounded collectors are held at ground po­
tential by R136. The base voltages of the other transistors
are controlled by the Channel Switch and Trigger View
circuitry.
When Channel 1 is selected to drive the Delay Line
Driver, the Q output of U540A is HI. The transistors with the
ungrounded collectors will then be forward-biased and the
Channel 1 signal will be conducted through to the Delay Line
Driver. If Channel 1 is not selected, then the Q output of
U540A is LO. The transistors with the ungrounded collec­
tors are then reverse-biased and the output signals will be
conducted to ground by the other transistor pair. The gain of
the Preamplifier is set by adjusting R145 to determine how
much signal current will be shunted between the two dif­
ferential outputs.
When TRIG VIEW push button S200 is pressed in, -8.6 V
is applied to R138 and R188 to turn off the transistors in
U130 and U180 with ungrounded collectors. Both the Chan­
nel 1 and Channel 2 output signals are then conducted to
ground. Zener diode VR200 turns on and CR200 and
CR201 become reverse biased. Trigger View transistors
Q440 and Q441 are then coupled to the Delay Line Driver
through forward-biased diodes CR202 and CR203. The crt
trace will then be a display of the A Trigger signal.
CHANNEL SWITCH AND VERTICAL
OUTPUT
The Channel Switch circuitry, shown on Diagram 2, uti­
lizes the front-panel VERTICAL MODE switches to select
the crt display format. See Figure 3-2 for a block diagram of
the circuit.
When any display mode other than X-Y is selected, the
XY line connected to S550 is at ground potential. VERTI­
CAL MODE switches S545 and S550 control the connec­
tion between the XY line and the S and W inputs of U540A
to obtain the various display formats described below.
TO DELAY
L IN E D R IV E R
4206-12
3-6
Figure 3-2. Block diagram of the Channel Switching circuitry.