Tektronix 2215A, Инструкция по эксплуатации

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Theory of Operation— 221 5A Service
Coupling capacitor C547 and resistors R547 and R548
form a differentiating circuit that produces positive- and neg­
ative-going short-duration pulses. These pulses are inverted
by U537B to generate the Chop Blank signal utilized by the
Z-Axis Amplifier.
The Alt Sync signal applied to one input of U537A is HI
except during Holdoff. This allows the output of U537C to
be inverted by U537A which drives the clock input of
U540A. Since the Q output of U540A is connected back to
the D input and both the S and R inputs are HI, the outputs
of U540A will toggle with each clock input. The Delay Line
Driver will then be driven alternately by the Channel 1 and
Channel 2 Preamplifiers at a rate determined by
multivibrator U537D.
ALTERNATE DISPLAY. In the ALT position, the Chop
Enable line is held HI and multivibrator U537D is disabled.
The output of U537C will be LO and the Chop Blank signal
from U537B will also be LO. Input signals to U537A will be
the LO from U537C and the Alt Sync signal from the Holdoff
circuitry in the A Sweep Generator. The output of U537A
will then be the inverted Alt Sync signal which clocks
U540A. This causes the outputs of U540A to toggle at the
end of each sweep so that the Channel 1 and Channel 2
Preamplifier signals will alternately drive the Delay Line
Driver.
Delay Line Driver
The Delay Line Driver converts the signal current from
the Vertical Preamplifiers or the Trigger View circuitry into a
signal voltage for input to the Delay Line. Transistors Q202,
Q203, Q206, and Q207 form a differential shunt-feedback
amplifier with the gain controlled by R216 and R217. Ampli­
fier compensation is provided by C210 and R210 and output
common-mode dc stabilization by U225. Should the voltage
at the junction of R222 and R223 deviate from zero, U225
will sink or source base current to Q202 and Q203 through
R202 and R203. This will return the outputs of the Delay
Line Driver to an average dc value of zero volts. Delay Line
DL210 provides a vertical signal delay of about 90 ns so
that the Sweep Generator has sufficient time to produce a
sweep before the vertical signal that triggered the sweep
reaches the crt deflection plates. This permits viewing the
leading edge of the internal signal that originated the trigger
pulse.
Vertical Output Amplifier
The Vertical Output Amplifier provides final amplification
of the input signals for application to the vertical deflection
plates of the crt. Signals from the Delay Line are applied to a
differential amplifier composed of Q230 and Q231 with low-
and high-frequency compensation provided by the RC net­
works connected between the emitters. Thermal compensa­
tion is provided by RT236, and overall gain is set by R233.
The output stage of the Amplifier utilizes two totem-pole
transistor pairs, Q254-Q256 and Q255-Q257, that convert
the collector currents of Q230 and Q231 to proportional out­
put voltages. Resistors R256, R258, R257, and R259 serve
as feedback elements and also as divider networks so that
each transistor in a pair drops half the final output voltage.
The Amplifier output signals are applied to the vertical de­
flection plates of the crt to produce deflection of the crt
beam.
BW LIMIT switch S226, C228 and C229, and a diode
bridge consisting of CR226, CR227, CR228, and CR229,
are utilized to reduce the bandwidth of the Amplifier if de­
sired. With the bandwidth limit off, R226 is grounded and
the nonconducting diode bridge isolates C228 and C229.
With bandwidth limit on, R226 is connected to the +8.6 V
supply and the diode bridge conducts. The two capacitors
are no longer isolated and will attenuate high-frequency
signals.
BEAM FIND switch S390 adjusts output-amplifier bias­
ing to limit the voltage swing at the crt plates. This keeps
the vertical trace within the graticule area for locating off­
screen traces. With the switch in the normal out position,
the —8.6 V supply provides emitter current to the Amplifier
output stage through R261. When the BEAM FIND switch is
in, the direct - 8 .6 V supply to R261 is removed and emitter
current is now supplied through R261 and R262 in series.
This reduces the amount of available emitter current and
limits the Amplifier dynamic range.
A /B Sw eep Separation Circuit
The circuit composed of Q283, Q284, Q285, and associ­
ated components provides a means of vertically positioning
the B trace with respect to the A trace during Alt Horizontal
Mode displays. During the B Sweep interval, the Sep signal
from the Alternate Display Switching circuit is LO and Q283
is biased off. This allows A/B SWP SEP potentiometer
R280 to affect the bias on one side of a differential current
source composed of Q284 and Q285. This supplies a dc
offset current to the Vertical Output Amplifier and changes
the position of the B trace on the crt screen.
During the A Sweep interval, the Sep signal is HI and
Q283 is turned on. The base voltages of Q284 and Q285
are then the same, and equal current is supplied to both
sides of the Vertical Output Amplifier so that no offset of the
A trace occurs.
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