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Glossary
5
and ‘distributed’ over the system. Distributed control is a concept basic to PLC
Systems.
DM area
A data area used to hold only word data. Words in the DM area cannot be ac-
cessed bit by bit.
DM word
A word in the DM area.
downloading
The process of transferring a program or data from a higher-level or host com-
puter to a lower-level or slave computer. If a Programming Device is involved,
the Programming Device is considered the host computer.
EEPROM
Electrically erasable programmable read-only memory; a type of ROM in which
stored data can be erased and reprogrammed. This is accomplished using a
special control lead connected to the EEPROM chip and can be done without
having to remove the EEPROM chip from the device in which it is mounted.
electrical noise
Random variations of one or more electrical characteristics such as voltage, cur-
rent, and data, which might interfere with the normal operation of a device.
EPROM
Erasable programmable read-only memory; a type of ROM in which stored data
can be erased, by ultraviolet light or other means, and reprogrammed.
error code
A numeric code generated to indicate that an error exists, and something about
the nature of the error. Some error codes are generated by the system; others
are defined in the program by the operator.
Error Log Area
An area used to store records indicating the time and nature of errors that have
occurred in the system.
even parity
A communication setting that adjusts the number of ON bits so that it is always
even. See
parity
.
event processing
Processing that is performed in response to an event, e.g., an interrupt signal.
exclusive NOR
A logic operation whereby the result is true if both of the premises are true or both
of the premises are false. In ladder-diagram programming, the premises are
usually the ON/OFF states of bits, or the logical combination of such states,
called execution conditions.
exclusive OR
A logic operation whereby the result is true if one, and only one, of the premises
is true. In ladder-diagram programming the premises are usually the ON/OFF
states of bits, or the logical combination of such states, called execution condi-
tions.
execution condition
The ON or OFF status under which an instruction is executed. The execution
condition is determined by the logical combination of conditions on the same
instruction line and up to the instruction currently being executed.
execution cycle
The cycle used to execute all processes required by the CPU Unit, including pro-
gram execution, I/O refreshing, peripheral servicing, etc.
execution time
The time required for the CPU Unit to execute either an individual instruction or
an entire program.
extended counter
A counter created in a program by using two or more count instructions in suc-
cession. Such a counter is capable of counting higher than any of the standard
counters provided by the individual instructions.
extended timer
A timer created in a program by using two or more timers in succession. Such a
timer is capable of timing longer than any of the standard timers provided by the
individual instructions.
Содержание CPM1A-20CAR-A
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Страница 29: ...14 System Configuration Section 1 2...
Страница 43: ...29 Unit Components Section 2 2...
Страница 65: ...51 Wiring and Connections Section 3 4...
Страница 123: ...Appendix B Dimensions 2 CPM1 CIF01 90 81 21 30 205 50 56 CPM1 CIF11 90 81 21 30 205 50 61...
Страница 124: ...Appendix B Dimensions 3 Dimensions with Peripheral Devices Attached Approx 90 Approx 125...
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