2-22
X10DRH-C/CT/i/iT Motherboard User’s Manual
1
2
Ground
19
20
NMI
X
X
FP PWRLED
3.3 V
HDD LED
UID Switch
NIC1 Link LED
NIC1 Activity LED
NIC2 Link LED
NIC2 Activity LED
UID LED
OH/Fan Fail/
PWR Fail LED)
Power Fail LED
3.3V
Reset Button
Power Button
Ground
Ground
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin definitions.
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin definitions.
NMI Button
Pin Definitions (JF1)
Pin# Definition
19
Control
20
Ground
Power LED
Pin Definitions (JF1)
Pin# Definition
15
3.3V
16
PWR LED
Front Control Panel Pin Definitions
A. NMI
B. PWR LED
A
B
I-SA
TA5
I-SA
TA4
I-SA
TA0
I-SA
TA1
I-SA
TA2
I-SA
TA3
I-SGPIO1 I-SGPIO2
S-SA
TA
JS39
USB0/1
FAN6
FAN5
FANB
FANA
FAN3
FAN2
FAN1
JBT1
LEDM1
LE1
LEDS5
LEDS6
DS13
JIPMB1
SP1
J23
JPS7
JPG1
JBR1
JI2C2
JI2C1
JPME2
JPS1
JWD1
JTPM1
USB2/3
BIOS
BT1
JSTBY1
JL1
JOH1
JD1
JS1
JF1
JPWR2
JPWR1
JPI2C1
USB4/5
USB6
USB7/8
BIOS
LICENSE
MAC CODE
BAR CODE
(3.0)
(3.0)
(2.0)
TPM/POR
T80
CPU1 SLOT1 PCI-E 3.0 X8
SAS4-7
COM2
CPU1 SLOT2 PCI-E 3.0 X8
CPU1 SLOT3 PCI-E 3.0 X8
CPU2 SLOT4 PCI-E 3.0 X16
CPU2 SLOT5 PCI-E 3.0 X8
CPU2 SLOT6 PCI-E 3.0 X8
UID
P1 DIMMC1 P1 DIMMC2
P2 DIMME1
P1 DIMMD1
P2 DIMME2
P1 DIMMD2
P2 DIMMF2
P2 DIMMF1
CPU1
P1 DIMMB2
P2 DIMMH2
P1 DIMMA2
P1 DIMMB1
P2 DIMMH1
P1 DIMMA1
P2 DIMMG2
VGA
P2 DIMMG1
LAN2 LAN1
(3.0)
IPMI_LAN
COM1
PWR I2C
CPU2 SLOT7 PCI-E 3.0 X8
FAN4
J24
X10DRH-C/i(T)
Rev. 1.00
JPB1
JPL1
TFM
LE2
CPU2
SAS0-3
LSI 3108
SAS CTRL
PCH
BMC
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
Battery
LAN CTRL