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Intel VT for Directed I/O
Select Enabled to bring up the following Intel VT for Directed I/O (VT-d) confi
guration submenu. The options are Enabled and Disabled.
VT-d for Port 0 (ESI)/VT-d for Port 1/VT-d for Port 5/VT-d for Port 9/VT-d
for DMI Port
Select Enabled to enable VT-d support for the port specifi ed through DRHD
Structures in the ACPI Tables. The options are Disabled and Enabled.
Memory Voltage
This feature allows the user to set memory voltage for onboard memory modules.
Select auto to allow the BIOS to automatically detect the onboard memory volt-
age according to the status of its SPD (Serial Presence Detect). Select 1.5V to
force the memory modules to run on 1.5V to accommodate lower-power FBDIMM
(Fully Buffered DIMM). Select 1.8V to force the memory module to run on 1.8 for
testing. The options are
Auto
, 1.5V and 1.8V. Warning: If set to 1.8V, damage
may occur to FBDIMM memory modules that only support 1.5V.
4GB PCI Hole Granularity
This feature allows you to select the granularity of PCI hole for PCI slots. If
MTRRs are not enough, this option may be used to reduce MTRR occupation.
The options are
256 MB
, 512 MB, 1GB and 2GB.
Memory Branch Mode
This option determines how the two memory branches operate. System address
space can either be interleaved between the two branches or Sequential from
one branch to another. Mirror mode allows data correction by maintaining two
copies of data in two branches. Single Channel 0 allows a single DIMM popula-
tion during system manufacturing. The options are
Interleave
, Sequential, Mir-
roring and Single Channel 0.
Branch 0 Rank Interleaving & Sparing
Select enable to enable the functions of Memory Interleaving and Memory Spar-
ing for Branch 0 Rank. The options for Memory Interleaving are 1:1, 2:1 and
4:1
. The options for Sparing are Enabled and
Disabled
.
Branch 1 Rank Interleaving & Sparing
Select enable to enable the functions of Memory Interleaving and Memory Spar-
ing for Branch 1 Rank. The options for Memory Interleaving are 1:1, 2:1 and
4:1
. The options for Sparing are Enabled and
Disabled
.
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