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D-1
Appendix D: AMI BIOS POST Diagnostics Error Messages
Appendix D
AMI BIOS POST Diagnostic Error
M e s s a g e s
This section describes the power-on self-tests (POST) port 80
codes for the AMI BIOS.
Check Point Description
03 NMI is Disabled Checking soft reset and power-on
next.
05 Soft reset/power-on determined. Going to disable
cache (i.e., disable shadow RAM/cache, if any).
06 Post code to be uncompressed. CPU init and CPU
data area init to be done next.
07 Post code is uncompressed. CPU init and CPU data
area init to be done next.
08 CPU and CPU data area init done. CMOS checksum
calculation to be done next.
09 The CMOS checksum calculation is done and the
CMOS RAM diagnostic byte has been written. CMOS
RAM initialization is next if the Initialize CMOS RAM At
Every Boot option is set.
0A CMOS RAM is initialize. The CMOS RAM status
register will be initialized for Date and Time next.
OB The CMOS RAM status register has been initialized.
Any initialization before the keyboard BAT test will be
done next.