Supero Super P6DNF, Руководство пользователя

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A-6
SUPER P6DOF/P6SOF User’s Manual
Channel Function
0 Spare (8-bit, 64 KB block transfer)
1 SDLC (8-bit, 64 KB block transfer)
2 Floppy Disk (8-bit, 64 KB block transfer)
3 Spare (8-bit, 64 KB block transfer)
4 Cascade for DMA controller 1
5 Spare (16-bit, 128 KB block transfer)
6 Spare (16-bit, 128 KB block transfer)
7 Spare (16-bit, 128 KB block transfer)
Address (Hex) Command Code
C0 CH-0 base and current address
C2 CH-0 base and current word count
C4 CH-1 base and current address
C6 CH-1 base and current word count
C8 CH-2 base and current address
CA CH-2 base and current word count
CC CH-3 base and current address
CE CH-3 base and current word count
D0 Read Status Register/Write Command Register
D2 Write Request Register
D4 Write Single Mask Register Bit
D6 Write Mode Register
D8 Clear Byte Pointer Flip-Flop
DA Read Temporary Register/Write Master Clear
DC Clear Master Register
DE Write All Mask Register Bits
A-5 Peripheral Controller
Details for the Peripheral Controller Direct
Memory Address (DMA) channels, controller registers, page register
addresses, interrupts, timers/counters, and CMOS RAM address
map are given below.
Table A-3. DMA Channels
Table A-4. DMA Controller Registers