37
Chapter 2: Installation
BAR CODE
J1
J3
145
1
DIMMD1
DIMME1
DIMMB1
DIMMA1
J9
J7
BT1
S-SGPIO1
MH2
MH1
JWD1
J25
JPME2 JVR1
JBT1
JRK1
MH4
MH9
MH7
MH3
MH8
JMD2
JMD1
SRW6
SRW3
SRW8
SRW7
SRW4
SRW5
JUIDB1
BMC_HB_LED1
JUSB3A1
JCPLD1
JIPMB1
UID_LED1
ALER
T_LED1
LEDPWR
JTPM1
J20
JKVM1
SAS1 SAS0
MH10
MH11
JPWR1
JPCIE1
SRW3
SRW7
SRW5
SRW3
SRW7
SRW5
SW1
/ S-SATA5
PCI-E 3.0 X4
JMD1:M.2-H
PCI-E 3.0 X4 / S-SATA1
JMD2:M.2-H
USB0/1
FAN1
2-3:NMI
1-2:RST
JWD1:WATCH DOG
CPU SLOT1 PCIE 3.0 X16
CPU MICRO-LP
PCIE 3.0 X8
1-2:NORMAL
2-3:ME MANUFACTURING MODE
TPM/POR
T80
J25 : SATA/SAS SELECT
2-3:AOC SAS
1-2:ONBOARD SATA
JPME2
JBT1 : CMOS CLEAR
CPU
DESIGNED IN USA
X11SPD-F
REV: 1.0
USB2(3.0)
Complex Programmable Logic Device (CPLD) Header
The Complex Programmable Logic Device, or CLPD, Header (JCPLD1) allows the backplane
to support NVMe devices.
1. Complex Programmable Logic
Device Header
2. SAS0
3. SAS1
1
SAS Ports
The X11SPD-F motherboard has two Serial Attached SCSI 3.0 ports (SAS0 and SAS1). Refer
to the tables below for pin definitions
No pin definitions available (checked X11SDD
manual, but chart is missing).
3
2
Содержание X11SPD-F
Страница 1: ...USER S MANUAL Revision 1 0 X11SPD F...