Chapter 2: Installation
2-15
JBT1
P1-DIMMB2
S-SA
TA3
IB CODE
BAR CODE
BIOS
LICENSE
COM1
JIPMB1
FAN3
FAN4
JSD1 JTPM1
JF1
UID_LED1
BMC_HB_LED1
JPG1 JPB1
JVRM2
JVRM1
JWD1
JPL1
/CPU2 PCI-E 3.0 X16)
(CPU2 SLOT1 PCI-E 3.0 X16)
PCI-E 3.0 X8)
(CPU2 SLOT2
UID SW
BATTERY
BIOS
BMC
VGA
QSFP
LAN1/LAN2
IB
10G/1G
(3.0)
USB0/1
IPMI_LAN
SA
TA
DOM+POWER
TPM/POR
T80
CPU2_VRM_HS1
CPLD
P2-DIMMG1
P2-DIMMH2
P2-DIMMH1
P2-DIMMG2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMF1
P1-DIMMD2
P1-DIMMD1
P1-DIMMC2
P1-DIMMC1
P1-DIMMB1 P1-DIMMA2 P1-DIMMA1
/CPU1PCI-E 3.0 X8)
(I-SA
TA0~5
CPU2
CPU1
LAN CTRL
PCH
IB_LINK_LED1
IB_ACT_LED1
(S-SA
TA0~2
SXB1
SXB2
Slot1
Slot2
SXB1
SXB2
X10DRT-P Series
Rev. 1.10
2-6 Control Panel Connectors and I/O Ports
The I/O ports are intended to be used in SMC Twin servers. See the picture below
for the locations of I/O ports.
Back Panel Connectors and I/O Ports
Back Panel I/O Port Locations and Definitions
1. Backpanel USB 3.0 Port 0
2. Backpanel USB 3.0 Port 1
3. IPMI_Dedicated LAN
4. GLAN Port 1 (for X10DRT-P/PIBQ/PIBF), 10G-LAN Port 1 (for
X10DRT-PT)
5. GLAN Port 2 (for X10DRT-P/PIBQ/PIBF), 10G-LAN Port 2 (for
X10DRT-PT)
6. QSFP (Quad Small Form-factor Pluggable) Connector used as
Connect-X3 InfiniBand Port (QDR 40GT/s or FDR 56GT/s) (for
X10DRT-PIBQ/PIBF)
7. Back Panel VGA (Blue)
8. UID Switch (On the motherboard)
1
2
3
4
5
6
7
