Supermicro SUPERSERVER 6027R-CDNRT+, Руководство пользователя

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Chapter 7: BIOS
7-11
MMCFG Base
Use this setting to set the default PCI MMIO base address. The default setting
is
0x90000000 .
Left Riser Card/Right Riser Card
When detected by the BIOS, these items display riser card information.
IIO 1 PCIe Port Bifurcation Control
This submenu configures the following IO PCIe Port Bifurcation Control settings
for IIO 1 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
II0 1 IOU2-PCIe Port
This feature allows the user to set the bus speed between the IOU1 and the
PCI-Exp port. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto .
II0 1 IOU3-PCIe Port
If this feature allows the user to set the bus speed between the IOU3 and the
PCI-Exp port. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto .
II0 2 PCIe Port Bifurcation Control
This submenu configures the following IO PCIe Port Bifurcation Control settings
for IIO 2 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
II0 2 IOU3-PCIe Port
If this feature allows the user to set the bus speed between the IOU3 and the
PCI-Exp port. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto .

QPI Configuration
Current QPI Link Speed
This item displays the current speed of the QPI Link.
Current QPI Frequency
This item displays the frequency of the QPI Link.
Isoc
Select Enabled to enable Ischronous support to meet QoS (Quality of Service)
requirements. This feature is especially important for virtualization technology.
The options are Enabled and
Disabled
.