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Chapter 5: BIOS
Monitor/Mwait
Select Enable to enable the Monitor/Mwait instructions. The Monitor instructions monitors
a region of memory for writes, and MWait instructions instruct the CPU to stop until the
monitored region begins to write. The options are Disable and
Enable
.
*The feature above is not available when CPU C State is disabled.
L1 Prefetcher
If enabled, the hardware prefetcher will prefetch streams of data and instructions from the main
memory to the L1 cache to improve CPU performance. The options are
Enable
and Disable.
L2 Prefetcher
If enabled, the hardware prefetcher will prefetch streams of data and instructions from the main
memory to the L2 cache to improve CPU performance. The options are
Enable
and Disable.
ACPI 3.0 T-States
Select Enable to support ACPI (Advanced Configuration and Power Interface) 3.0 T-States to
determine how the processor will report to the operating system during CPU-Throttling states.
The options are
Disable
and Enable.
Max CPUID Value Limit
Use this feature to set the maximum CPU ID value. Enable this feature to boot the legacy
operating systems that cannot support processors with extended CPUID functions. The
options are Enable and
Disable
.
Execute Disable Bit
Set to Enable for Execute Disable Bit support, which will allow the processor to designate
areas in the system memory where an application code can execute and where it cannot,
thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor or
damaging the system during a virus attack. The options are Disable and
Enable
. (Refer to
Intel and Microsoft websites for more information.)
Virtualization Technology
Select Enable to use Intel Virtualization Technology to allow one platform to run multiple
operating systems and applications in independent partitions, creating multiple virtual systems
in one physical computer. The options are Disable and
Enable
.
Extended APIC (Advanced Programmable Interrupt Controller)
Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this item is set to Enable, the APIC ID will
be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are Disable
and
Enable
.
