Supermicro Supero X8DA3, Руководство пользователя

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Chapter 1: Introduction
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1-2 Chipset Overview
Built upon the functionality and the capability of the Intel 5520 platform, the
X8DA3/X8DAi motherboard provides the performance and feature set required for
dual-processor-based high-end systems with confi guration options optimized for
workstations, high-end CAD systems, and intensive applications. The 5500 Series
Processor platform consists of the 5500 Series Processor (LGA 1366) processor,
the 5200 (North Bridge), and the ICH10R (South Bridge). With the Intel QuickPath
interconnect controller built in the processor, the 5500 Series Processor platform is
the fi rst dual-processing platform to offer the next generation point-to-point system
interconnect interface, replacing the current Front Side Bus Technology, providing
substantial system performance enhancement by utilizing serial link interconnec-
tions, allowing for increased bandwidth and scalability.
The IOH connects to each processor through an independent QuickPath Inter-
connect link. Each link consists of 20 pairs of unidirectional differential lanes for
transmission and receiving in addition to a differential forwarded clock. A full-width
QuickPath interconnect link pair provides 84 signals. Each processor supports two
QuickPath link, one going to the other processor and the other to the 5520 chip.
The Intel 5520 platform supports up to 36 PCI Express Gen2 lanes, and the 5520
North Bridge supports peer-to-peer read and write transactions. The ICH10R pro-
vides up to 6 PCI-Express ports, six SATA ports and 10 USB connections.
In addition, the Intel 5520 platform also offers a wide range of RAS (Reliability,
Availability and Serviceability) features. These features include memory interface
ECC, x4/x8 Single Device Data Correction (SDDC), Cyclic Redundancy Check
(CRC), parity protection, out-of-band register access via SMBus, memory mirror-
ing, memory sparing, and Hot-plug support on the PCI-Express Interface.
Main Features of the 5500 Series Processor and the 5520
Chipset
Four processor cores in each processor with 8MB shared cache among cores
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Two full-width Intel QuickPath interconnect links, up to 6.4 GT/s of data transfer
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rate in each direction
Virtualization Technology, Integrated Management Engine supported
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Point-to-point cache coherent interconnect, Fast/narrow unidirectional links, and
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Concurrent bi-directional traffi c
Error detection via CRC and Error correction via Link level retry
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