1-6
SUPERSERVER 2027PR-DC0R/DC0FR/DC0TR USER'S MANUAL
Figure 1-1. C602 Chipset:
System Block Diagram
Note:
This is a general block diagram. Please see Chapter 5 for details.
SANDYBRIDGE
SANDYBRIDGE
QPI
#1
DDR3 DIMM
DDR3 DIMM
DDR3 DIMM
DDR3 DIMM
DDR3 DIMM
#1
DDR3 DIMM
G
A
SSB
PATSBURG
PEG0
DMI
PEG1_1
USB
LAN
I350 /
X540
2 ports
SATA
AT25321
LPC
CPU FRONT
FAN Side
CPU REAR
(I/O Side)
PEG1_8
USB
REAR
HDR 2X5
QPI
DDR3 DIMM
B
DDR3 DIMM
D
C
H
F
E
Socket 0
Socket 1
#1
#1
#1
#1
P0
P0
P1
P1
VGA BMC
VGA CONN
WPCM450
DDR2
PHY1
LAN
RTL8201F
SPI
UM1
PCI-E x8 GEN3
Gen3 x16
Gen3 x8
x8
HOTSWAP INTERFACE
SATA3 #0
SATA3 #1
SATA2 #3
SATA2 #4
SATA2 #5
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PCI-32bit
DDR3 DIMM
#2
DDR3 DIMM
#2
DDR3 DIMM
DDR3 DIMM
#2
#2
DDR3 DIMM
#2
DDR3 DIMM
#2
DDR3 DIMM
#2
DDR3 DIMM
#2
x8
Gen3 x16
TPM Header
SATA2 #2
USB Type-A
SCU
S-SATA #0
S-SATA #1
S-SATA #3
S-SATA #2
x16
PCI-E x16 Gen 3
PORT1
PORT2
PORT3
Node 1
Node 2
x8
Combine with SATA/SAS
hotswap interface
Gen3 x16
PCI-E x16 Proprietary Interface
IB FDR/QDR
x8
#1
#1
PE3 PE2 PE1 DMI
PE3 PE2 PE1 DMI
RJ45
RJ45
0,1
2,3
SATA DOM
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