Chapter 4: UEFI BIOS
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Memory Interleaving Size
This setting controls the memory interleaving size. This determines the starting address of
the interleave (bit 8, 9, 10 or 11). The options are 256 Bytes, 512 Bytes, 1 KB, 2 KB or
Auto
.
Chipset Interleaving
This setting controls interleave memory blocks across the DRAM chip for node 0. The
options are Disabled and
Auto
.
BankGroupSwap
This setting controls the Bank Group Swap. The options are Enabled, Disabled and
Auto
.
DRAM Scrub Time
This setting provides a value that is the number of hours to scrub memory. The options are
Disabled, 1 hour, 4 hours, 8 hours, 16 hours, 24 hours, 48 hours, and
Auto
.
CPU1 Memory Information
These sections are for informational purposes. They will display some details about the
detected memory according to each CPU on the motherboard, such as:
•
Detected Size (per slot, in MB)
•
Current Speed (MT/s)
PCIe/PCI/PnP Configuration
This menu provides PCIe/PCI/PnP configuration settings and information.
PCI Bus Driver Version
PCI Devcies Common Settings:
Above 4G Decoding
This setting Disables or
Enables
64-bit capable devices ability to be decoded in above 4G
address space (only if the system supports 64-bit PCI decoding).
SR-IOV Support
If the system has SR-IOV capable PCI-E devices, this setting will Disable or
Enable
the
Single Root IO Virtualization Support for the system.
BME DMA Mitigatioin
Use this setting to re-enable the Bus Master Attribute that was disabled during PCI enumeration
for PCI bridges after SMM is locked. The options are
Disabled
and Enabled.
