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FatTwin F619P2-RT/RTN/RC0/RC1 User's Manual
Figure 1-4. Motherboard Layout
1.6 Motherboard Layout
Below is a layout of the X11DPFR-S/SN with jumper, connector and LED locations shown. See
the table on the following page for descriptions. For detailed descriptions, pinout information
and jumper settings, refer to Chapter 4.
1
+
DESIGNED IN USA
M
AC C
ODE
X11DPFR-S
RE
V:1.00
BAR C
ODE
FAN2
S-SA
TA1
S-SA
TA0
FAN3
FAN1
JS2
JS1
JNVI2C1
JIP
MB1
JPWR_HDD3
JPWR_HDD2
JPWR_HDD1
JPWR9
JPWR10
JSXB3
JSXB2
JSXB1
JPB1
JPG1
JVRM2
JVRM1
JP
ME1
JBT1
BMC_HB_LED1
LED1
UID_LED1
JSIOM1
JPWRBT1
JCPLD1
JRK1
BT1
JSDCARD1
IPMI_LAN1
JNVME2
JNVME1
JNVME3
JNVME4
JTP
M1
I-SA
TA4~7
(3.0)
CPU2 PCI-E 3.0 X8
I-SA
TA0~3
CPU1 PCI-E 3.0 X16
CPU1 PCI-E 3.0 X8
PCH
BIOS
BMC
JPP1/JTAG SCAN
JPP0/JTAG SCAN
CPU2 PCI-E 3.0 X16
VGA
P1-DIMMC1
COM1
CPU1
USB0/1
DESIGNED IN USA
X11DPFR-S(N)
REV:1.00
CPU2
P1-DIMMB1 P1-DIMM
A1
P1-DIMMD1 P1-DIMME1 P1-DIMMF1
P2-DIMM
A1
P2-DIMMB1 P2-DIMMC1
P2-DIMMF1 P2-DIMME1 P2-DIMMD1
COM1
VGA
JPWR9
LED1 JIPMB1
IPMI LAN
USB0/1
UIDLED1
JPB1
BMC_HB_LED1
JCPLD1
JPWR10
JPWR_HDD2
JPWR_HDD1
JNVME3
JNVME4
FAN3
FAN2
FAN1
JPWRBT1
JSXB2
JTPM1
JS1
JS2
JSXB3
BT1
JRK1
JPG1
BMC
JNVI2C1
JSDCARD1
JVRM1
S_SATA1
JBT1
JSIOM1
JVRM2
JPME1
JSXB1
JNVME2
JNVME1
JPWR_HDD3
S_SATA0
I-SATA4~7
I-SATA0~3
Notes:
•
See Chapter 4 for detailed information on jumpers, I/O ports, and JF1 front panel connec
-
tions.
•
Jumpers/LED indicators not indicated are used for internal testing only.