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Chapter 3  Single Connection of MKY02

3 - 17

Figure 3.17 shows an example circuit for a HUB with eight ports in full-duplex mode.

Содержание MKY02

Страница 1: ...HUB IC MKY02 User s Manual for Hi speed Link System STD HLS02 V1 7E...

Страница 2: ...em 3 We assume no responsibility whatsoever for any losses or damages arising from the use of the information products and circuits in this document or for infringement of patents and any other rights...

Страница 3: ...z Prerequisites This manual assumes that you are familiar with y Network technology y Semiconductor products especially microcontrollers and memory z Related Manuals y Hi speed Link System Introducti...

Страница 4: ...7 3 Detection of Error Packet 1 13 1 8 Features of MKY02 1 14 Chapter 2 MKY02 Hardware 2 3 Chapter 3 Single Connection of MKY02 3 1 Voltage Levels of Pins Connecting to Signal Pins 3 4 3 2 Supplying D...

Страница 5: ...f Hardware Reset Signal 4 7 4 2 5 Selecting Communication Mode 4 8 4 2 6 Connection of Each Port 4 8 4 2 7 Placement of Monitor LEDs 4 9 4 3 Example Circuit for Port added HUB by Cascade Connection 4...

Страница 6: ...Fig 2 2 Pin Electrical Characteristics in I O Circuit Types of MKY02 2 6 Fig 3 1 Connection Causing Leakage Current 3 4 Fig 3 2 Cascade Clock Generation 3 6 Fig 3 3 Clock Connection 3 6 Fig 3 4 Hardwa...

Страница 7: ...e Clocks 4 7 Fig 4 8 Selection of Communication Mode 4 8 Fig 4 9 Monitor Placement Example for Port added HUB 4 9 Fig 4 10 Example Circuit for HUB with 22 Ports 4 10 Fig 4 11 Example of Connection in...

Страница 8: ...MKY02 User s Manual for Hi speed Link System viii...

Страница 9: ...the MKY02 HUB in the Hi speed Link System HLS 1 1 Role of MKY02 1 3 1 2 Basic HLS Configuration 1 3 1 3 HLS Configuration using HUBs 1 4 1 4 Basic HUB Connection 1 9 1 5 Multi drop Network of HUBs 1...

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Страница 11: ...ing this manual 1 2 Basic HLS Configuration Figure 1 1 shows the basic HLS configuration with one center IC and multiple satellite ICs connected on a multi drop network Rt in the figure indicates a te...

Страница 12: ...icates a termination resistor The user system can extend the recommended network cable length by adding the inserted count of HUBs 1 to the basic HLS configuration For example adding a single HUB doub...

Страница 13: ...tained from our practical experiments These values are provided as a guide for stable HLS operation in various user systems but performance is not guaranteed Therefore in many user systems the user ca...

Страница 14: ...network cables can be branched by adding HUBs to the HLS network Figure 1 3 shows an example of an HLS configuration in which network cables are branched Figure 1 3 shows the network cables that are...

Страница 15: ...resistors Rt cannot be connected to the terminal connected in the intermediate position the halfway position in the network cable of the multi drop network However a one to one connection between all...

Страница 16: ...speed Link System 1 8 1 3 4 Star Topology Mounting a HUB IC to the terminal containing the center IC of the HLS can offer a star topology Fig 1 5 Furthermore network cables in a star topology can als...

Страница 17: ...nect port 0 to the center side The number of HUBs to be added in the routes derived from the center equipment is called the number of inserted HUBs The number of inserted HUBs is determined by the typ...

Страница 18: ...m in which the network cables should be divided The number of inserted HUBs shown in Figure 1 7 is 1 As shown in Figure 1 7 in cases where port 0 of the HUB is placed in the intermediate position the...

Страница 19: ...ng the center side and 21 ports 7 ports 3 connecting the satellite side Fig 1 8 If a HUB with ports added by cascading MKY02s is added to a network the number of inserted HUBs between terminals and th...

Страница 20: ...rations 1 and 2 function independently 4 When the FH pin is Low level half duplex mode either of the above operations 1 and 2 starting first functions During this period no ports receive a packet As d...

Страница 21: ...et If the signal transformation of the received packet exceeds 49 the MKY02 recognizes the packet as an error packet If the MKY02 detects an error in the received packet during sending the MKY02 immed...

Страница 22: ...packet 5 Has output pins for receiving monitor for each port to turn on monitor LEDs when eight ports receive a packet 6 Has output pins that can turn on monitor LEDs when any one or more of the eigh...

Страница 23: ...Chapter 1 Concepts for Using MKY02 HUB 1 15...

Страница 24: ...MKY02 User s Manual for Hi speed Link System 1 16...

Страница 25: ...Chapter 2 MKY02 Hardware This chapter describes the hardware such as pin assignment pin functions and input out put circuit type of the MKY02...

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Страница 27: ...Chapter 2 MKY02 Hardware 2 3 Chapter 2 MKY02 Hardware This chapter describes the MKY02 hardware such as pin assignment pin functions and I O circuit type Figure 2 1 shows the MKY02 pin assignment...

Страница 28: ...ct to the COE2 pin of the MKY02 for lower cascade connection Fix this pin at Low when is not cascade connected CIP2 26 Positive I Input pin for cascade connection Connect to the COP2 pin of the MKY02...

Страница 29: ...open when it is not cascade connected COP2 55 Positive O Output pin for cascade connection Connect to the CIP2 pin of the MKY02 for higher cascade connection Leave this pin open when it is not cascade...

Страница 30: ...O AXS0 C 52 I BPS0 B 5 I RXD4 A 21 O COP1 C 37 I AX0 B 53 I BPS1 B 6 O TXE1 C 22 O COD1 C 38 VDD 54 O COD2 C 7 O TXE2 C 23 O COHR C 39 I AX1 B 55 O COP2 C 8 O TXE3 C 24 GND 40 O AXS1 C 56 O COE2 C 9...

Страница 31: ...ed using one MKY02 inserted into the HLS 3 1 Voltage Levels of Pins Connecting to Signal Pins 3 4 3 2 Supplying Driving Clock and Hardware Reset Signal 3 5 3 3 Connecting Network Interface 3 8 3 4 Con...

Страница 32: ......

Страница 33: ...connecting the MKY02 be sure to connect the TEST1 pin pin 46 and TEST2 pin pin 47 to the GND pins In a HUB configured using one MKY02 to be inserted into the HLS be sure to fix the function select pin...

Страница 34: ...he CMOS input pins of peripheral logic circuits driven by the 5 0 V power supply This pins cannot be connected even if a pull up resistor is used between the 5 0 V power supplies Fig 3 1 1 When signal...

Страница 35: ...upper frequency limit is 50 MHz and there is no lower frequency limit 2 For the electrical specifications of the Xi pin refer to Chapter 2 MKY02 Hardware 3 Connect a clock with a signal rise and fall...

Страница 36: ...the AXS2 pin to the AX2 pin as shown in Figure 3 3 Table 3 1 shows the output frequencies of cascade clocks from the AXS0 AXS1 and AXS2 pins corresponding to the settings of the BPS0 and BPS1 pins wh...

Страница 37: ...l signal has been input is less than one clock of the AX0 pin cascade clock the signal is ignored to prevent a malfunction To reset the MKY02 completely the RST pin must be kept Low for 10 clocks of t...

Страница 38: ...When the specification of the HLS containing a HUB configured using the MKY02 is full duplex mode fix the FH pin pin 51 at High When the specification is half duplex mode fix the FH pin at Low Fig 3 5...

Страница 39: ...1 to 7 Connect the output signals of the transmit enable pins TXE1 to TXE7 of the MKY02 to the driver enable input pins of the TRX connected to ports 1 to 7 Connect the receiver out put signals of the...

Страница 40: ...ng the HLS full duplex mode requires two twisted pair cables and half duplex requires one twisted pair cable When HUB ports are connected at the end of the network cable connect a termination resistor...

Страница 41: ...to the LED rating To test the LED the LEDRCV pin outputs a Low level for 500000 TAX1 while a hardware reset is activated and after the hardware reset is canceled The Low pulse output from the LEDRCV...

Страница 42: ...t from the LEDRZE pin is generated by a retriggerable one shot multivibrator with a minimum time of 500000 TAX1 Xi 48 MHz 12 Mbps 43 69 ms 6 Mbps 87 38 ms 3 Mbps 174 76 ms Therefore if any of the eigh...

Страница 43: ...the port that has received a packet for a time of 217 TAX1 The MKY02 outputs the stored status to the RLDT pin as the signal format shown in Figure 3 12 for a next time of 217 TAX1 As shown in Figure...

Страница 44: ...d latches The green LED indicating stability should be connected as a port receive monitor LED Leave the RLDT pin RLCK pin and RLLD pin open when an additional circuit is not connected to them If any...

Страница 45: ...gnal lines to the driver receiver pulse transformer and network cable connector do not cross each other or do not extend the anaog signla lines unnecessarily except digi tal signal lines between the M...

Страница 46: ...nnection of MKY02 Figure 3 16 shows an example circuit for a HUB with eight ports port 0 of the center side and ports 1 to 7 of the satellite side in half duplex mode In the example circuit 3 6 and 12...

Страница 47: ...Chapter 3 Single Connection of MKY02 3 17 Figure 3 17 shows an example circuit for a HUB with eight ports in full duplex mode...

Страница 48: ...MKY02 User s Manual for Hi speed Link System 3 18...

Страница 49: ...s required to design a multiport HUB with nine or more ports refer to 1 6 Port Addition to HUB config ured using multiple MKY02s to be inserted into the HLS 4 1 Concepts of Port Addition 4 3 4 2 Pract...

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Страница 51: ...s stacking is suitable as shown in the Figure 4 1 Stacking is to connect one port of the sattelite side to the port 0 of the next MKY02 The connection by stacking has the following demerits 1 Time lag...

Страница 52: ...f multiple MKY02s are cascade connected the time lag from receiving to sending packets described in 1 7 1 Receiving and Sending Packets is consistent across any port and the HUB is identical to the HU...

Страница 53: ...cascade pins CIx1 CIE1 CID1 CIP1 and CIHR of the MKY02 with next priority 3 Leave the cascade pins COx1 COE1 COD1 COP1 and COHR of the MKY02 with the lowest pri ority open 4 Fix the cascade pins CIx2...

Страница 54: ...e of 2 TBPS The High level status signals for packet transmission control are output from the COE1 COP1 and COHR pins 2 The packets which ports 1 to 7 of the non highest priority MKY02 received are tr...

Страница 55: ...in pin 34 at a Low level or a High level when left open this pin can be fixed at a High level due to an internal pull up resistor 2 Fix the BPS0 pin pin 52 and BPS1 pin 53 pin at a Low level or a High...

Страница 56: ...refer to 3 3 2 Connection of Port 0 and use it as a port to connect to the center IC Leave the TXE0 pin pin 62 and TXD0 pin pin 63 of any MKY02 other than the highest priority one open Fix the RXD0 p...

Страница 57: ...tor LED as a representative of the port which one MKY02 serves by the number of MKY02 to be used Fig 4 9 For details of the packet error monitor refer to 3 4 2 Packet Error Monitor The user who design...

Страница 58: ...MKY02 User s Manual for Hi speed Link System 4 10 4 3 Example Circuit for Port added HUB by Cascade Connection...

Страница 59: ...ows an example circuit for a HUB with 22 ports port 0 of the center side and ports 1 to 21 of the satellite side in half duplex mode In the example the baud rates of 12 Mbps 6 Mbps and 3 Mbps can be s...

Страница 60: ...MKY02 User s Manual for Hi speed Link System 4 12...

Страница 61: ...tion of MKY02 4 13 To design a HUB with 22 ports port 0 of the center side and ports 1 to 21 of the satellite side in full duplex mode change the connection of the TRX and FH pin pin 51 in Figure 4 10...

Страница 62: ...MKY02 User s Manual for Hi speed Link System 4 14...

Страница 63: ...ings This chapter describes the ratings of the MKY02 5 1 Electrical Ratings 5 3 5 2 AC Characteristics 5 3 5 3 Package Dimensions 5 8 5 4 Recommended Soldering Conditions 5 9 5 5 Recommended Reflow Co...

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Страница 65: ...Table 5 2 Electrical Ratings Parameter Symbol Conditions Min Typ Max Unit Operating power supply voltage VDD 3 0 3 3 3 6 V Mean operating current VDDA Vi VDD or Vss Xi 50 MHz AX0 50 MHz output open 5...

Страница 66: ...AXS2 pin to AX2 pin Symbol Name Min Max Unit TXI Clock period width 20 ns TXIH Clock High level width 5 ns TXIL Clock Low level width 5 ns TRST Reset enable Low level width 10 TAX0 ns BPS1 pin BPS0 p...

Страница 67: ...nit TBPS TAX1 5 ns Symbol Name Min Typ Max Remarks TTXEH Period in which TXE pin goes High 146 TAX1 146 TAX2 5 ns TRNW Short pulse width of input signal 0 51 TAX1 1 0 TAX1 1 49 TAX1 Allowable pulse wi...

Страница 68: ...nd LEDRZE Pins Symbol Name Min Typ Max TCS1 Cascade connection signal 1 146 TAX1 146 TAX1 5 ns TCS2 Cascade connection signal 2 142 TAX1 142 TAX1 5 ns TCS3 Cascade connection signal 3 High or Low leve...

Страница 69: ...TAX1 217 TAX1 217 1 TAX1 ns TRLLL RLDT output time 215 1 TAX1 215 TAX1 215 1 TAX1 ns TRLD RLDT bit time 212 1 TAX1 212 TAX1 212 1 TAX1 ns TRLDS RLDT Setup 211 1 TAX1 211 TAX1 211 1 TAX1 ns TRLDH RLDT...

Страница 70: ...MKY02 User s Manual for Hi speed Link System 5 8 5 3 Package Dimensions...

Страница 71: ...e resonance affecting lead strength 5 5 Recommended Reflow Conditions The recommended conditions apply to hot air reflow or infrared reflow Temperature indi cates resin surface temperature of the pack...

Страница 72: ...imum value of period in whichTXE pin goes High 1 7E JUN 2021 1 3 Deleted the needed configuration described in 4 Deleted the Caution 1 9 Deleted the chapter titled 1 3 5 Handling Fiber optic Cables 3...

Страница 73: ...tepTechnica Co Ltd 2 32 6 Shimo fujisawa Iruma shi Saitama 358 0011 TEL 81 4 2964 8804 https www steptechnica com info steptechnica com HUB IC MKY02 User s Manual for Hi speed Link System Document No...

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