Stanford Research Systems SR844, Руководство пользователя

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Status Registers 4-31
SR844 RF Lock-In Amplifier
Status Register Definitions
The SR844 reports on its status by means of four status registers: the Serial Poll Status,
the Standard Event Status, the LIA Status and the Error Status.
The status bits are set to 1 when an event has occurred or a state is present, as described
in the tables below.
Serial Poll Status Register: *STB?, *SRE
bit name set when
0 SCN No data storage is in progress. Paused storage is still considered to be in
progress.
1 IFC No command execution is in progress (Interface Ready).
2 ERR An enabled bit in the Error status register has been set.
3 LIA An enabled bit in the LIA status register has been set.
4 MAV The interface output buffer is not empty.
5 ESB An enabled bit in the Standard Event status register has been set.
6 SRQ A service request has occurred.
7 unused
Standard Event Status Register: *ESR?, *ESE
bit name set when
0 RXQ Input queue overflows. This occurs when too many characters are
received at once and causes the queues to be cleared.
1 –– unused
2 TXQ Output queue overflows. This occurs when too many characters are
waiting to be transmitted and causes the queues to be cleared.
3 –– unused
4 EXE Command execution error occurs.
5 CMD Illegal command is received.
6 URQ Any key-press or knob rotation.
7 PON Power-on.
Bits in this register remain set until cleared by reading them or by the
*CLS
command.