DocID027916 Rev 2
19/79
UM1902
Hardware layout and configuration
78
Note:
The I
2
C address of WM8994ECS/R is 0b0011010.
JP5
PD6 is as FMC_NWAIT signal when JP5 is set as shown to the right (Default
setting):
PD6 is connected to digital microphone as I2S data signal when JP5 is set as shown
to the right (it is also needed to set JP18 together according to this table):
JP17
Digital microphone power source is connected to +3.3 V power when JP17 is set as
shown to the right (Default setting):
Digital microphone power source is connected to MICBIAS1 from WM8994ECS/R
when JP17 is set as shown to the right:
JP21
PA2 is connected to SAI2_SCKB when JP21 is set as shown to the right (Default
setting):
PA2 is connected to MII_MDIO (Ethernet) when JP21 is set as shown to the right:
JP22
PC1 is connected to SAI1_SDA when JP22 is set as shown to the right (Default
setting):
PC1 is connected to MII_MDC (Ethernet) when JP22 is set as shown to the right:
Table 6. Audio related jumpers (continued)
Jumper
Description