Hardware layout and configuration
UM1460
12/67
DocID022136 Rev 5
2.3 Clock
source
Four clock sources are available for the STM32F417IGH6 and RTC embedded:
•
X1, 25 MHz crystal for Ethernet PHY with socket. It can be removed when clock is
provided by MCO pin of the MCU.
•
X2, 26 MHz crystal for USB-OTG HS PHY
•
X3, 32 kHz crystal for embedded RTC
•
X4, 25 MHz crystal with socket for the STM32F417IGH6 microcontroller. It can be
removed from socket when internal RC clock is used.
2.4 Reset
source
The reset signal of STM3241G-EVAL evaluation board is low active. Reset sources include:
•
Reset button B1
•
Debugging tools from JTAG connector CN14 and trace connector CN13
•
Daughterboard from CN3
•
RS-232 connector CN16 for ISP
•
ST-LINK/V2
2.5 Audio
The STM3241G-EVAL evaluation board features stereo audio play and microphone
recording by an external headset connected on audio jack CN11.
•
An audio DAC CS43L22 is connected to both the I2S2 port and a DAC channel, while a
microphone amplifier is connected to the ADC of the STM32F417IGH6.
•
The CS43L22 can be configured via I2C1 and the external PLL (U36) can be used to
provide an external clock which is connected to the I2S_CKIN pin (PC9).
Note:
To avoid speaker damage it is mandatory to connect the headphone to the board on CN11
during debug of audio code. When the program is stopped on a breakpoint, a DC voltage
may be applied to the speaker which induces power consumption incompatible with the
speaker.
Warning:
Signal I2S_SD (PI3) is close to signal TCK/SWCLK of the
JTAG/SWD interface, so to avoid possible communication
issues on JTAG/SWD when the I2S interface is used the
recommendations are to:
1) Prefer usage of embedded ST-LINK/V2 to external tool
connected on CN14.
2) Configure PI3 GPIO in low speed (2 MHz or 10 MHz).
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
