Board description
AN2744
44/56
The startup phase could also be critical for the SMPS as output overshoot occurs if the
circuit is not properly designed. Care must be taken in designing a proper clamp network in
order to prevent voltage spikes due to leakage inductance from exceeding the breakdown
voltage of the device (730 V minimum value).
The startup transient is shown in
. Note that the maximum drain-source voltage
doesn't exceed the minimum breakdown voltage BVDSS, with a reasonable safety margin.
Finally, load regulation is presented in
and
for different load conditions.
The voltage ranges from 10 V to 9.3 V, within the requested tolerance.
Figure 40.
Typical waveforms at 230 V
AC
: open
load
Figure 41.
Typical waveforms at 230 V
AC
: full
load
Ch1 Freq - 9.62kHz; Ch2 Mean - 9.90V
Ch1 Freq - 57.71kHz; Ch2 Mean - 13.79V; Ch4 Max -
503mA
I
OUT
V
DD
V
DS
I
OUT
V
DD
V
DS
V
DS
I
OUT
V
DD
V
DS
I
OUT
V
DD
Figure 42.
Typical waveforms at 265 V
AC
:
short-circuit
Figure 43.
Typical waveforms at 265 V
AC
:
startup
Ch2 Freq - 23.50Hz; Ch4 Max - 2.08A; Ch4 Mean - 383mA
Ch1 Max - 702V; Ch2 Mean - 19.72V; Ch4 Max - 500mA
V
DS
V
DD
I
OUT
V
DS
V
DD
I
OUT
V
DS
I
OUT
V
DD
V
DS
I
OUT
V
DD
Содержание ST7538Q
Страница 3: ...AN2744 Contents 3 56 Appendix A Board layout 53 10 Revision history 55...
Страница 15: ...AN2744 Board description 15 56 Figure 7 Modem and coupling interface schematic...
Страница 16: ...Board description AN2744 16 56 Figure 8 Power supply schematic HIGH VOLTAGE SECTION...
Страница 53: ...AN2744 Board layout 53 56 Appendix A Board layout Figure 50 PCB layout top view...
Страница 54: ...Board layout AN2744 54 56 Figure 51 PCB layout bottom view...
