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5-5
WLL-RX55
157
160
165
170
175
180
185
190
195
200
205
208
OFDM DEMODULATOR
—TOP VIEW—
104
100
95
90
85
80
75
70
65
60
55
53
156 155
150
145
140
135
130
125
120
115
110
105
1
5
10
15
20
25
30
35
40
45
50
52
IC
CXD9153R (SONY)
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
PIN
NO.
I/O
SIGNAL
PD0
TESTSW0
D.GND
TESTSW1
A.GND
A.V
CC
ADVRH
AIFDT
A.GND
A.GND
AOUT
DAVRN
DAVRP
A.V
CC
D.GND
CRESET
EA
EXCKEN
D.V
CC
CLOCK
IBUSDT0
IBUSDT1
IBUSDT2
TCK7
PLLA
A.GND
A.V
CC
IBUSDT3
IBUSDT4
IBUSDT5
IBUSDT6
IBUSDT7
TCK0
D.V
CC
IBUSDT8
IBUSDT9
TCK1
D.GND
TCK2
IBUSDT10
IBUSDT11
TCK3
D.V
CC
IBUSDT12
TCK4
D.GND
IBUSDT13
IBUSDT14
RESET
D.GND
TCK5
IBUSDT15
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
TCK6
D.V
CC
D.GND
TDILDB0
TDILDB1
TDILDB2
TDILDB3
D.GND
D.V
CC
TDILDB4
TDILDB5
TDILDB6
TDILDB7
TDILDB8
TDILDB9
TDILDB10
TDILDB11
D.V
CC
TDILDB12
D.GND
D.V
CC
TDILDB13
TDILDB14
TDILDB15
OTDILCS
OTDILWE
D.V
CC
OTDILOE
NWR
SDA
SCL
D.V
CC
D.GND
D.V
CC
NRD
NOE
INTR
ICERR
OTDILAB0
OTDILAB1
OTDILAB2
OTDILAB3
OTDILAB4
D.GND
D.V
CC
OSCLK
OTDILAB5
OTDILAB6
OTDILAB7
OTDILAB8
OTDILAB9
OTDILAB10
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
O
O
—
O
O
O
O
O
O
—
O
O
O
O
—
I
O
O
—
O
O
O
O
O
—
—
—
O
O
O
O
O
O
—
O
O
O
—
O
O
O
O
—
O
O
O
O
O
O
—
O
O
OTDILAB11
OTDILAB12
D.GND
OBCLK
OTDILAB13
OTDILAB14
OTDILAB15
OTDILAB16
OTDILAB17
D.V
CC
OQCLK
OTDILAB18
OTDILAB19
OTDILAB20
D.GND
SMPCK
OTDILAB21
OHCLK
D.V
CC
OASIEN
OTPSERR
OTPSST
OTPSDT
OTSERR
D.V
CC
D.GND
D.V
CC
OTSVAL
OTSST
OTSDT0
OTSDT1
OTSDT2
OTSDT3
D.V
CC
OTSDT4
OTSDT5
OTSDT6
D.GND
OTSDT7
OTCLK
OBUSADT0
OBUSADT1
D.V
CC
OBUSADT2
OBUSADT3
OBUSADT4
OBUSADT5
OBUSADT6
OBUSADT7
D.GND
ODCLK
OBUSADT8
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
O
O
O
O
O
O
O
—
—
O
O
O
O
O
O
O
O
O
O
—
—
O
O
O
O
—
—
O
O
O
I/O
I
—
—
O
O
I
I
I
I
I
I
I
—
—
I
I
I
I
I
I
I
OBUSADT9
OBUSADT10
OBUSADT11
OBUSADT12
OBUSADT13
OBUSADT14
OBUSADT15
D.GND
D.V
CC
OFCLK
OBUSADT16
OBUSADT17
OBUSADT18
OBUSADT19
OBUSADT20
OBUSADT21
OBUSADT22
OBUSADT23
OBUSADT24
D.GND
D.V
CC
OBUSADT25
OBUSADT26
OBUSADT27
OBUSADT28
D.V
CC
D.V
CC
OBUSADT29
OBUSADT30
OBUSADT31
OAGCP
PD1
D.GND
D.V
CC
TDO
PLLL
PD2
ADR0
ADR1
CCR0
CCR1
BUSEN
TRST
D.GND
D.V
CC
TCK
TDI
TMS
ADR3
ADR2
CNFGEN
CNFGSW
I
I
—
I
—
—
O
I
—
—
O
O
O
—
—
I
I
I
—
I
I
I
I
I
I
—
—
I
I
I
I
I
I
—
I
I
I
—
I
I
I
I
—
I
I
—
I
I
I
—
I
I
I
—
—
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
I/O
—
—
I/O
I/O
I/O
O
O
—
O
I
I/O
I/O
—
—
—
I
O
O
O
O
O
O
O
O
—
—
O
O
O
O
O
O
O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
INPUTS
ADR0 - ADR3
AIFDT
BUSEN
CCR0, CCR1
CLOCK
CNFGEN
CNFGSW
CRESET
EA
EXCKEN
IBUSDT0 - IBUSDT15
NRD
NWR
PD0
-
PD2
PLLA
RESET
SMPCK
TCK, TDI, TMS, TRST
TCK0
TCK1
TCK2
TCK3
TCK4
TCK5
TCK6
TCK7
TESTSW0, TESTSW1
OUTPUTS
ADVRH
AOUT
DAVRN, DAVRP
ICERR
INTR
NOE
OASIEN
OBCLK
OBUSADT0 - OBUSADT31
ODCLK
OFCLK
OHCLK
OQCLK
OSCLK
OTCLK
OTDILAB0 - OTDILAB21
OTDILCS
OTDILOE
OTDILWE
OTPSDT
OTPSERR
OTPSST
OTSDT0 - OTSDT7
OTSERR
OTSST
OTSVAL
PLLL
TDO
INPUTS/OUTPUTS
OAGCP
SCL
SDA
TDILDB0 - TDILDB15
: IIC ADDRESS
: ANALOG INTERMEDIATE FREQUENCY OFDM SIGNAL (4.5 MHz)
: BUS ENABLE
: IIC CLOCK
: SYSTEM CLOCK (18 MHz)
: CONFIGURATION ENABLE
: CONFIGURATION SWITCH
: CLOCK DRIVER RESET
: FOR VPD
: CLOCK ENABLE
: DATA BUS
: IIC READ ENABLE
: IIC WRITE ENABLE
: POWER DOWN FOR ANALOG BLOCK
: TEST
: CHIP RESET
: SAMPLING CLOCK FOR ASI DATA
: TEST
: TEST CLOCK (54.86 MHz)
: TEST CLOCK (36.57 MHz)
: TEST CLOCK (18.29 MHz)
: TEST CLOCK (13.71 MHz)
: TEST CLOCK (9.14 MHz)
: TEST CLOCK (6.86 MHz)
: TEST CLOCK
: SCAN TEST CLOCK
: TEST MODE
: REFERENCE VOLTAGE FOR A/D
: CONTROL VOLTAGE FOR VCXO
: REFERENCE VOLTAGE
: IIC ERROR
: IIC INTERRUPT
: IIC VALID
: ASI ENABLE FLAG
: OUTPUT BCLK (6.85 MHz)
: DATA BUS
: OUTPUT DCLK (18.29 MHz)
: OUTPUT FCLK (36.57 MHz)
: OUTPUT HCLK (54.48 MHz)
: OUTPUT QCLK (13.7 MHz)
: OUTPUT SCLK (9.14 MHz)
: TS PACKET CLOCK
: TIME INTERLEAVE ADDRESS
: EXTERNAL SRAM CHIP SELECT
: EXTERNAL SRAM OUTPUT ENABLE
: EXTERNAL SRAM WRITE ENABLE
: TPS DATA
: TPS ERROR FLAG
: TPS START FLAG
: TS PACKET DATA
: TS PACKET ERROR FLAG
: TS PACKET START FLAG
: TS PACKET VALID
: PLL LOCK FLAG
: TEST
: TRI-STATE BUS
: SERIAL CLOCK
: SERIAL DATA
: TIME INTERLEAVE DATA
Содержание WLL-RX55
Страница 1: ...WIRELESS CAMERA RECEIVER WLL RX55 MAINTENANCE MANUAL 1st Edition Serial No 100001 and Higher ...
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Страница 230: ...Printed in Japan Sony Corporation 2004 2 08 B P Company 2004 WLL RX55 SY J E 9 968 042 01 ...