Sony MDS-JA50ES / Mode d’emploi, Руководство по обслуживанию

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• IC121 Digital Signal Processor, Digital Servo Processor, EFM/ACIRC Encoder/Decoder (CXD2535CR)/BD board
Function Pin No. Pin Name I/O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
FS256
FOK
DFCT
SHCK
SHCKEN
WRPWR
DIRC
SWDT
SCLK
XLAT
SRDT
SENS
ADSY
SQSY
DQSY
XRST
TEST4
CLVSCK
TEST5
DOUT
DIN
FMCK
ADER
REC
DVSS
DOVF
DODT
DIDT
DTI
DTO
C2PO
BCK
LRCK
XTAO
XTAI
MCLK
XBCK
DVDD
WDCK
RFCK
O
O
O
O
I
I
I
I
I
I
O
O (3)
O
O
O
I
I
O
I
O
I
O
O
I
—
I
I
O
I
O (3)
O
O
O
O
I
O
O
—
O
O
11.2896 MHz clock output (MCLK) (Not used)
Output of FOK signal to system controller
Outputs “H” when focus is set
Outputs defect ON/OFF switching signal to ATRAC encoder/decoder
Outputs track jump detection signal to system controller
Track jump detection enable input (Not used) (Fixed at “H”)
Inputs laser power switching signal from system controller
Disc drive recording/playback switching signal input (Fixed at “H”)
Inputs write data signal from system controller
Inputs serial clock signal from system controller
Inputs serial latch signal from system controller
Outputs read data signal to system controller
Outputs internal status (SENSE) to system controller
ADIP sync signal output (Not used)
Output subcode Q sync (SCOR) to system controller
Outputs “L” every 13.3 msec Outputs “H” at all most mostly
Outputs digital-in U-bit CD format subcode Q sync (SCOR) to system controller
Outputs “L” every 13.3 msec Outputs “H” at all most mostly
Inputs reset signal from system controller Reset: “L”
Test input (Fixed at “L”)
Not used
Test input (Fixed at “L”)
Digital audio signal output (For optical output)
Digital audio signal input (For optical input) (Not used)
ADIP FM demodulation clock signal output
ADIP CRC flag output “H”:Error
Input of recording/playback switching signal from system controller
Recording: “H” Playback: “L”
Ground (Digital)
Digital audio output validity flag input (Fixed at “L”)
Input of 16bit data for digital audio output
Output of 16bit data for digital audio input to ATRAC encoder/decoder
Input of recording audio data signal from ATRAC encoder/decoder
Output of playback audio data signal to ATRAC encoder/decoder
Outputs C2PO signal to ATRAC encoder/decoder (Output indicating data error status)
Playback: C2PO (“H”) Digital recording: Digital-in-Vflag Analog recording: “L”
Outputs bit clock signal (2.8224 MHz) (MCLK)
Outputs L/R clock signal (44.1 kHz) (MCLK)
System clock (512 fs=22.5792 MHz) signal output
Input of system clock (512fs=22.5792 MHz) signal input
MCLK clock (22.5792 MHz) signal output (Not used)
Pin 32 (BCK) inversion output (Not used)
Power supply (+5V) (Digital)
WDCK clock (88.2 kHz) signal output (MCLK)
RFCK clock (7.35 kHz) signal output (MCLK)